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Commit 8830cb67 authored by John Daiker's avatar John Daiker Committed by John W. Linville
Browse files

atmel: checkpatch.pl cleanups



Before: 881 errors, 265 warnings, 4507 lines checked
After:  114 errors, 273 warnings, 4548 lines checked

This was mostly "space required after that ',' (ctx:VxV)".
Also a fair number of whitespace, code indent, and C99 comment cleanups.

New warnings introduced are all "line over 80 character"

md5sums are identical, as I skipped any fixes which may have altered the resulting binary.

Signed-off-by: default avatarJohn Daiker <daikerjohn@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 62b4fb66
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+242 −201
Original line number Diff line number Diff line
@@ -106,35 +106,35 @@ static struct {
#define MAX_BSS_ENTRIES	64

/* registers */
#define GCR  0x00    //      (SIR0)  General Configuration Register
#define BSR  0x02    //      (SIR1)  Bank Switching Select Register
#define GCR  0x00    /* (SIR0)  General Configuration Register */
#define BSR  0x02    /* (SIR1)  Bank Switching Select Register */
#define AR   0x04
#define DR   0x08
#define MR1  0x12    //      Mirror Register 1
#define MR2  0x14    //      Mirror Register 2
#define MR3  0x16    //      Mirror Register 3
#define MR4  0x18    //      Mirror Register 4
#define MR1  0x12    /* Mirror Register 1 */
#define MR2  0x14    /* Mirror Register 2 */
#define MR3  0x16    /* Mirror Register 3 */
#define MR4  0x18    /* Mirror Register 4 */

#define GPR1                            0x0c
#define GPR2                            0x0e
#define GPR3                            0x10
//
// Constants for the GCR register.
//
#define GCR_REMAP     0x0400          // Remap internal SRAM to 0
#define GCR_SWRES     0x0080          // BIU reset (ARM and PAI are NOT reset)
#define GCR_CORES     0x0060          // Core Reset (ARM and PAI are reset)
#define GCR_ENINT     0x0002          // Enable Interrupts
#define GCR_ACKINT    0x0008          // Acknowledge Interrupts

#define BSS_SRAM      0x0200          // AMBA module selection --> SRAM
#define BSS_IRAM      0x0100          // AMBA module selection --> IRAM
//
// Constants for the MR registers.
//
#define MAC_INIT_COMPLETE       0x0001        // MAC init has been completed
#define MAC_BOOT_COMPLETE       0x0010        // MAC boot has been completed
#define MAC_INIT_OK             0x0002        // MAC boot has been completed
/*
 * Constants for the GCR register.
 */
#define GCR_REMAP     0x0400          /* Remap internal SRAM to 0 */
#define GCR_SWRES     0x0080          /* BIU reset (ARM and PAI are NOT reset) */
#define GCR_CORES     0x0060          /* Core Reset (ARM and PAI are reset) */
#define GCR_ENINT     0x0002          /* Enable Interrupts */
#define GCR_ACKINT    0x0008          /* Acknowledge Interrupts */

#define BSS_SRAM      0x0200          /* AMBA module selection --> SRAM */
#define BSS_IRAM      0x0100          /* AMBA module selection --> IRAM */
/*
 *Constants for the MR registers.
 */
#define MAC_INIT_COMPLETE       0x0001        /* MAC init has been completed */
#define MAC_BOOT_COMPLETE       0x0010        /* MAC boot has been completed */
#define MAC_INIT_OK             0x0002        /* MAC boot has been completed */

#define MIB_MAX_DATA_BYTES    212
#define MIB_HEADER_SIZE       4    /* first four fields */
@@ -212,9 +212,9 @@ struct tx_desc {
#define TX_DESC_PACKET_TYPE_OFFSET   17
#define TX_DESC_HOST_LENGTH_OFFSET   18

///////////////////////////////////////////////////////
// Host-MAC interface
///////////////////////////////////////////////////////
/*
 * Host-MAC interface
 */

#define TX_STATUS_SUCCESS       0x00

@@ -226,14 +226,14 @@ struct tx_desc {
#define TX_PACKET_TYPE_DATA     0x01
#define TX_PACKET_TYPE_MGMT     0x02

#define ISR_EMPTY               0x00        // no bits set in ISR
#define ISR_TxCOMPLETE          0x01        // packet transmitted
#define ISR_RxCOMPLETE          0x02        // packet received
#define ISR_RxFRAMELOST         0x04        // Rx Frame lost
#define ISR_FATAL_ERROR         0x08        // Fatal error
#define ISR_COMMAND_COMPLETE    0x10        // command completed
#define ISR_OUT_OF_RANGE        0x20        // command completed
#define ISR_IBSS_MERGE          0x40        // (4.1.2.30): IBSS merge
#define ISR_EMPTY               0x00        /* no bits set in ISR */
#define ISR_TxCOMPLETE          0x01        /* packet transmitted */
#define ISR_RxCOMPLETE          0x02        /* packet received */
#define ISR_RxFRAMELOST         0x04        /* Rx Frame lost */
#define ISR_FATAL_ERROR         0x08        /* Fatal error */
#define ISR_COMMAND_COMPLETE    0x10        /* command completed */
#define ISR_OUT_OF_RANGE        0x20        /* command completed */
#define ISR_IBSS_MERGE          0x40        /* (4.1.2.30): IBSS merge */
#define ISR_GENERIC_IRQ         0x80

#define Local_Mib_Type          0x01
@@ -311,22 +311,22 @@ struct tx_desc {
#define MAX_ENCRYPTION_KEYS 4
#define MAX_ENCRYPTION_KEY_SIZE 40

///////////////////////////////////////////////////////////////////////////
// 802.11 related definitions
///////////////////////////////////////////////////////////////////////////
/*
 * 802.11 related definitions
 */

//
// Regulatory Domains
//
/*
 * Regulatory Domains
 */

#define REG_DOMAIN_FCC		0x10	//Channels	1-11	USA
#define REG_DOMAIN_DOC		0x20	//Channel	1-11	Canada
#define REG_DOMAIN_ETSI		0x30	//Channel	1-13	Europe (ex Spain/France)
#define REG_DOMAIN_SPAIN	0x31	//Channel	10-11	Spain
#define REG_DOMAIN_FRANCE	0x32	//Channel	10-13	France
#define REG_DOMAIN_MKK		0x40	//Channel	14	Japan
#define REG_DOMAIN_MKK1		0x41	//Channel	1-14	Japan(MKK1)
#define REG_DOMAIN_ISRAEL	0x50	//Channel	3-9	ISRAEL
#define REG_DOMAIN_FCC		0x10	/* Channels	1-11	USA				*/
#define REG_DOMAIN_DOC		0x20	/* Channel	1-11	Canada				*/
#define REG_DOMAIN_ETSI		0x30	/* Channel	1-13	Europe (ex Spain/France)	*/
#define REG_DOMAIN_SPAIN	0x31	/* Channel	10-11	Spain				*/
#define REG_DOMAIN_FRANCE	0x32	/* Channel	10-13	France				*/
#define REG_DOMAIN_MKK		0x40	/* Channel	14	Japan				*/
#define REG_DOMAIN_MKK1		0x41	/* Channel	1-14	Japan(MKK1)			*/
#define REG_DOMAIN_ISRAEL	0x50	/* Channel	3-9	ISRAEL				*/

#define BSS_TYPE_AD_HOC		1
#define BSS_TYPE_INFRASTRUCTURE 2
@@ -364,13 +364,13 @@ struct tx_desc {
#define CIPHER_SUITE_CCX      4
#define CIPHER_SUITE_WEP_128  5

//
// IFACE MACROS & definitions
//
//
/*
 * IFACE MACROS & definitions
 */

// FuncCtrl field:
//
/*
 * FuncCtrl field:
 */
#define FUNC_CTRL_TxENABLE		0x10
#define FUNC_CTRL_RxENABLE		0x20
#define FUNC_CTRL_INIT_COMPLETE		0x01
@@ -433,7 +433,7 @@ struct atmel_private {
	struct net_device *dev;
	struct device *sys_dev;
	struct iw_statistics wstats;
	spinlock_t irqlock, timerlock;	// spinlocks
	spinlock_t irqlock, timerlock;	/* spinlocks */
	enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
	enum {
		CARD_TYPE_PARALLEL_FLASH,
@@ -1420,10 +1420,17 @@ static int atmel_proc_output (char *buf, struct atmel_private *priv)
				     priv->firmware_id);

		switch (priv->card_type) {
		case CARD_TYPE_PARALLEL_FLASH: c = "Parallel flash"; break;
		case CARD_TYPE_SPI_FLASH: c = "SPI flash\n"; break;
		case CARD_TYPE_EEPROM: c = "EEPROM"; break;
		default: c = "<unknown>";
		case CARD_TYPE_PARALLEL_FLASH:
			c = "Parallel flash";
			break;
		case CARD_TYPE_SPI_FLASH:
			c = "SPI flash\n";
			break;
		case CARD_TYPE_EEPROM:
			c = "EEPROM";
			break;
		default:
			c = "<unknown>";
		}

		r = "<unknown>";
@@ -1440,15 +1447,32 @@ static int atmel_proc_output (char *buf, struct atmel_private *priv)
	}

	switch (priv->station_state) {
	case STATION_STATE_SCANNING: s = "Scanning"; break;
	case STATION_STATE_JOINNING: s = "Joining"; break;
	case STATION_STATE_AUTHENTICATING: s = "Authenticating"; break;
	case STATION_STATE_ASSOCIATING: s = "Associating"; break;
	case STATION_STATE_READY: s = "Ready"; break;
	case STATION_STATE_REASSOCIATING: s = "Reassociating"; break;
	case STATION_STATE_MGMT_ERROR: s = "Management error"; break;
	case STATION_STATE_DOWN: s = "Down"; break;
	default: s = "<unknown>";
	case STATION_STATE_SCANNING:
		s = "Scanning";
		break;
	case STATION_STATE_JOINNING:
		s = "Joining";
		break;
	case STATION_STATE_AUTHENTICATING:
		s = "Authenticating";
		break;
	case STATION_STATE_ASSOCIATING:
		s = "Associating";
		break;
	case STATION_STATE_READY:
		s = "Ready";
		break;
	case STATION_STATE_REASSOCIATING:
		s = "Reassociating";
		break;
	case STATION_STATE_MGMT_ERROR:
		s = "Management error";
		break;
	case STATION_STATE_DOWN:
		s = "Down";
		break;
	default:
		s = "<unknown>";
	}

	p += sprintf(p, "Current state:\t\t%s\n", s);
@@ -1460,11 +1484,14 @@ static int atmel_read_proc(char *page, char **start, off_t off,
{
	struct atmel_private *priv = data;
	int len = atmel_proc_output (page, priv);
        if (len <= off+count) *eof = 1;
	if (len <= off+count)
		*eof = 1;
	*start = page + off;
	len -= off;
        if (len>count) len = count;
        if (len<0) len = 0;
	if (len > count)
		len = count;
	if (len < 0)
		len = 0;
	return len;
}

@@ -2013,11 +2040,20 @@ static int atmel_set_rate(struct net_device *dev,
		} else {
		/* Setting by frequency value */
			switch (vwrq->value) {
			case  1000000: priv->tx_rate = 0; break;
			case  2000000: priv->tx_rate = 1; break;
			case  5500000: priv->tx_rate = 2; break;
			case 11000000: priv->tx_rate = 3; break;
			default: return -EINVAL;
			case  1000000:
				priv->tx_rate = 0;
				break;
			case  2000000:
				priv->tx_rate = 1;
				break;
			case  5500000:
				priv->tx_rate = 2;
				break;
			case 11000000:
				priv->tx_rate = 3;
				break;
			default:
				return -EINVAL;
			}
		}
	}
@@ -2063,10 +2099,18 @@ static int atmel_get_rate(struct net_device *dev,
	} else {
		vwrq->fixed = 1;
		switch (priv->tx_rate) {
		case 0: vwrq->value =  1000000; break;
		case 1: vwrq->value =  2000000; break;
		case 2: vwrq->value =  5500000; break;
		case 3: vwrq->value = 11000000; break;
		case 0:
			vwrq->value =  1000000;
			break;
		case 1:
			vwrq->value =  2000000;
			break;
		case 2:
			vwrq->value =  5500000;
			break;
		case 3:
			vwrq->value = 11000000;
			break;
		}
	}
	return 0;
@@ -2576,8 +2620,7 @@ static const struct iw_priv_args atmel_private_args[] = {
	},
};

static const struct iw_handler_def atmel_handler_def =
{
static const struct iw_handler_def atmel_handler_def = {
	.num_standard	= ARRAY_SIZE(atmel_handler),
	.num_private	= ARRAY_SIZE(atmel_private_handler),
	.num_private_args = ARRAY_SIZE(atmel_private_args),
@@ -3474,7 +3517,6 @@ static void atmel_command_irq(struct atmel_private *priv)
		return;

	switch (command) {

	case CMD_Start:
		if (status == CMD_STATUS_COMPLETE) {
			priv->station_was_associated = priv->station_is_associated;
@@ -3999,8 +4041,7 @@ static int reset_atmel_card(struct net_device *dev)
	else
		build_wep_mib(priv);

	if (old_state == STATION_STATE_READY)
	{
	if (old_state == STATION_STATE_READY) {
		union iwreq_data wrqu;

		wrqu.data.length = 0;