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Commit 87fec051 authored by Anton Blanchard's avatar Anton Blanchard Committed by Benjamin Herrenschmidt
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powerpc: PTRACE_PEEKUSR/PTRACE_POKEUSER of FPR registers in little endian builds 



FPRs overlap the high 64bits of the first 32 VSX registers. The
ptrace FP read/write code assumes big endian ordering and grabs
the lowest 64 bits.

Fix this by using the TS_FPR macro which does the right thing.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent e156bd8a

arch/powerpc/kernel/ptrace.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -1554,8 +1554,8 @@ long arch_ptrace(struct task_struct *child, long request, 




			flush_fp_to_thread(child);

			flush_fp_to_thread(child);

			if (fpidx < (PT_FPSCR - PT_FPR0))

			if (fpidx < (PT_FPSCR - PT_FPR0))

				tmp = ((unsigned long *)child->thread.fpr)

				memcpy(&tmp, &child->thread.TS_FPR(fpidx),

					[fpidx * TS_FPRWIDTH];

				       sizeof(long));

			else

			else

				tmp = child->thread.fpscr.val;

				tmp = child->thread.fpscr.val;

		}

		}
@@ -1587,8 +1587,8 @@ long arch_ptrace(struct task_struct *child, long request, 




			flush_fp_to_thread(child);

			flush_fp_to_thread(child);

			if (fpidx < (PT_FPSCR - PT_FPR0))

			if (fpidx < (PT_FPSCR - PT_FPR0))

				((unsigned long *)child->thread.fpr)

				memcpy(&child->thread.TS_FPR(fpidx), &data,

					[fpidx * TS_FPRWIDTH] = data;

				       sizeof(long));

			else

			else

				child->thread.fpscr.val = data;

				child->thread.fpscr.val = data;

			ret = 0;

			ret = 0;