Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 86853c83 authored by Haojian Zhuang's avatar Haojian Zhuang Committed by Linus Walleij
Browse files

gpio: add gpio offset in gpio range cells property 



Add gpio offset into "gpio-range-cells" property. It's used to support
sparse pinctrl range in gpio chip.

Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent e3929714

Documentation/devicetree/bindings/gpio/gpio.txt

+3 −3
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ announce the pinrange to the pin ctrl subsystem. For example, 
		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";

		reg = <0x1460 0x18>;

		gpio-controller;

		gpio-ranges = <&pinctrl1 20 10>, <&pinctrl2 50 20>;

		gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;



    }
@@ -107,8 +107,8 @@ where, 


   Next values specify the base pin and number of pins for the range

   handled by 'qe_pio_e' gpio. In the given example from base pin 20 to

   pin 29 under pinctrl1 and pin 50 to pin 69 under pinctrl2 is handled

   by this gpio controller.

   pin 29 under pinctrl1 with gpio offset 0 and pin 50 to pin 69 under

   pinctrl2 with gpio offset 10 is handled by this gpio controller.



The pinctrl node must have "#gpio-range-cells" property to show number of

arguments to pass with phandle from gpio controllers node.

arch/arm/boot/dts/spear1310.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -89,7 +89,7 @@ 
		pinmux: pinmux@e0700000 {

			compatible = "st,spear1310-pinmux";

			reg = <0xe0700000 0x1000>;

			#gpio-range-cells = <2>;

			#gpio-range-cells = <3>;

		};



		apb {
@@ -212,7 +212,7 @@ 
				interrupt-controller;

				gpio-controller;

				#gpio-cells = <2>;

				gpio-ranges = <&pinmux 0 246>;

				gpio-ranges = <&pinmux 0 0 246>;

				status = "disabled";



				st-plgpio,ngpio = <246>;

arch/arm/boot/dts/spear1340.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ 
		pinmux: pinmux@e0700000 {

			compatible = "st,spear1340-pinmux";

			reg = <0xe0700000 0x1000>;

			#gpio-range-cells = <2>;

			#gpio-range-cells = <3>;

		};



		pwm: pwm@e0180000 {
@@ -127,7 +127,7 @@ 
				interrupt-controller;

				gpio-controller;

				#gpio-cells = <2>;

				gpio-ranges = <&pinmux 0 252>;

				gpio-ranges = <&pinmux 0 0 252>;

				status = "disabled";



				st-plgpio,ngpio = <250>;

arch/arm/boot/dts/spear310.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
		pinmux: pinmux@b4000000 {

			compatible = "st,spear310-pinmux";

			reg = <0xb4000000 0x1000>;

			#gpio-range-cells = <2>;

			#gpio-range-cells = <3>;

		};



		fsmc: flash@44000000 {
@@ -102,7 +102,7 @@ 
				interrupt-controller;

				gpio-controller;

				#gpio-cells = <2>;

				gpio-ranges = <&pinmux 0 102>;

				gpio-ranges = <&pinmux 0 0 102>;

				status = "disabled";



				st-plgpio,ngpio = <102>;

arch/arm/boot/dts/spear320.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ 
		pinmux: pinmux@b3000000 {

			compatible = "st,spear320-pinmux";

			reg = <0xb3000000 0x1000>;

			#gpio-range-cells = <2>;

			#gpio-range-cells = <3>;

		};



		clcd@90000000 {
@@ -130,7 +130,7 @@ 
				interrupt-controller;

				gpio-controller;

				#gpio-cells = <2>;

				gpio-ranges = <&pinmux 0 102>;

				gpio-ranges = <&pinmux 0 0 102>;

				status = "disabled";



				st-plgpio,ngpio = <102>;