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Commit 86662ca5 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'amlogic-dt64-3' of... 

Merge tag 'amlogic-dt64-3' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Amlogic 64-bit DT updates, round3
- AXG: add new clock driver

* tag 'amlogic-dt64-3' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic

:
  ARM64: dts: meson: fix clock source of the pclk for UART_AO
  ARM64: dts: meson-axg: add AO clock driver
  dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings
  dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC
  clk: meson: gxbb: expose VDEC_1 and VDEC_HEVC clocks
  dt-bindings: clock: meson8b: export the NAND clock

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 4108e98e 9adda353

Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required Properties: 
	- GXBB (S905) : "amlogic,meson-gxbb-aoclkc"

	- GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"

	- GXM (S912) : "amlogic,meson-gxm-aoclkc"

	- AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"

	followed by the common "amlogic,meson-gx-aoclkc"



- #clock-cells: should be 1.

arch/arm64/boot/dts/amlogic/meson-axg.dtsi

+14 −2
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/axg-clkc.h>

#include <dt-bindings/clock/axg-aoclkc.h>

#include <dt-bindings/gpio/meson-axg-gpio.h>

#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
@@ -1030,6 +1031,17 @@ 
			#size-cells = <2>;

			ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;



			sysctrl_AO: sys-ctrl@0 {

				compatible = "amlogic,meson-axg-ao-sysctrl", "syscon", "simple-mfd";

				reg =  <0x0 0x0 0x0 0x100>;



				clkc_AO: clock-controller {

					compatible = "amlogic,meson-axg-aoclkc";

					#clock-cells = <1>;

					#reset-cells = <1>;

				};

			};



			pinctrl_aobus: pinctrl@14 {

				compatible = "amlogic,meson-axg-aobus-pinctrl";

				#address-cells = <2>;
@@ -1162,7 +1174,7 @@ 
				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";

				reg = <0x0 0x3000 0x0 0x18>;

				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;

				clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;

				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;

				clock-names = "xtal", "pclk", "baud";

				status = "disabled";

			};
@@ -1171,7 +1183,7 @@ 
				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";

				reg = <0x0 0x4000 0x0 0x18>;

				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;

				clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;

				clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;

				clock-names = "xtal", "pclk", "baud";

				status = "disabled";

			};

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -751,12 +751,12 @@ 
};



&uart_AO {

	clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;

	clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;

	clock-names = "xtal", "pclk", "baud";

};



&uart_AO_B {

	clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;

	clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;

	clock-names = "xtal", "pclk", "baud";

};

arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -760,12 +760,12 @@ 
};



&uart_AO {

	clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;

	clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;

	clock-names = "xtal", "pclk", "baud";

};



&uart_AO_B {

	clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;

	clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;

	clock-names = "xtal", "pclk", "baud";

};

include/dt-bindings/clock/axg-aoclkc.h

0 → 100644
+26 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */

/*

 * Copyright (c) 2016 BayLibre, SAS

 * Author: Neil Armstrong <narmstrong@baylibre.com>

 *

 * Copyright (c) 2018 Amlogic, inc.

 * Author: Qiufang Dai <qiufang.dai@amlogic.com>

 */



#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK

#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK



#define CLKID_AO_REMOTE		0

#define CLKID_AO_I2C_MASTER	1

#define CLKID_AO_I2C_SLAVE	2

#define CLKID_AO_UART1		3

#define CLKID_AO_UART2		4

#define CLKID_AO_IR_BLASTER	5

#define CLKID_AO_SAR_ADC	6

#define CLKID_AO_CLK81		7

#define CLKID_AO_SAR_ADC_SEL	8

#define CLKID_AO_SAR_ADC_DIV	9

#define CLKID_AO_SAR_ADC_CLK	10

#define CLKID_AO_ALT_XTAL	11



#endif