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Commit 865e8b76 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Kukjin Kim
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ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary 



Commit c2dd114d ("ARM: EXYNOS: fix register setup for AFTR mode
code") added S5P_CENTRAL_SEQ_OPTION register setup fix for all
Exynos SoCs to AFTR mode code-path.  It turned out that for coupled
cpuidle AFTR mode on Exynos4210 (added by the next patch) applying
this fix causes lockup so enable it in the AFTR mode code-path only
on SoCs that require it (in the suspend code-path it can be always
applied like it was before commit c2dd114d ("ARM: EXYNOS: fix
register setup for AFTR mode code")

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Colin Cross <ccross@google.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene@kernel.org>
parent 97bf6af1

arch/arm/mach-exynos/pm.c

+7 −4
Original line number Diff line number Diff line
@@ -97,10 +97,6 @@ void exynos_pm_central_suspend(void) 
	tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);

	tmp &= ~S5P_CENTRAL_LOWPWR_CFG;

	pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);



	/* Setting SEQ_OPTION register */

	pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,

		       S5P_CENTRAL_SEQ_OPTION);

}



int exynos_pm_central_resume(void)
@@ -164,6 +160,13 @@ void exynos_enter_aftr(void) 


	exynos_pm_central_suspend();



	if (of_machine_is_compatible("samsung,exynos4212") ||

	    of_machine_is_compatible("samsung,exynos4412")) {

		/* Setting SEQ_OPTION register */

		pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,

			       S5P_CENTRAL_SEQ_OPTION);

	}



	cpu_suspend(0, exynos_aftr_finisher);



	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {

arch/arm/mach-exynos/suspend.c

+4 −0
Original line number Diff line number Diff line
@@ -282,6 +282,10 @@ static int exynos_pm_suspend(void) 
{

	exynos_pm_central_suspend();



	/* Setting SEQ_OPTION register */

	pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,

		       S5P_CENTRAL_SEQ_OPTION);



	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)

		exynos_cpu_save_register();