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Commit 85bf59d1 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Jani Nikula
Browse files

drm/i915: Fix iboost setting for SKL Y/U DP DDI buffer translation entry 2 



The spec was recently fixed to have the correct iboost setting for the
SKL Y/U DP DDI buffer translation table entry 2. Update our tables
to match.

Cc: David Weinehall <david.weinehall@linux.intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470140517-13011-1-git-send-email-ville.syrjala@linux.intel.com


Cc: stable@vger.kernel.org
Reviewed-by: default avatarDavid Weinehall <david.weinehall@linux.intel.com>
(cherry picked from commit 5ac90567)
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 58e311b0

drivers/gpu/drm/i915/intel_ddi.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -145,7 +145,7 @@ static const struct ddi_buf_trans skl_ddi_translations_dp[] = { 
static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = {

static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = {

	{ 0x0000201B, 0x000000A2, 0x0 },

	{ 0x0000201B, 0x000000A2, 0x0 },

	{ 0x00005012, 0x00000088, 0x0 },

	{ 0x00005012, 0x00000088, 0x0 },

	{ 0x80007011, 0x000000CD, 0x0 },

	{ 0x80007011, 0x000000CD, 0x1 },

	{ 0x80009010, 0x000000C0, 0x1 },

	{ 0x80009010, 0x000000C0, 0x1 },

	{ 0x0000201B, 0x0000009D, 0x0 },

	{ 0x0000201B, 0x0000009D, 0x0 },

	{ 0x80005012, 0x000000C0, 0x1 },

	{ 0x80005012, 0x000000C0, 0x1 },
@@ -158,7 +158,7 @@ static const struct ddi_buf_trans skl_u_ddi_translations_dp[] = { 
static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = {

static const struct ddi_buf_trans skl_y_ddi_translations_dp[] = {

	{ 0x00000018, 0x000000A2, 0x0 },

	{ 0x00000018, 0x000000A2, 0x0 },

	{ 0x00005012, 0x00000088, 0x0 },

	{ 0x00005012, 0x00000088, 0x0 },

	{ 0x80007011, 0x000000CD, 0x0 },

	{ 0x80007011, 0x000000CD, 0x3 },

	{ 0x80009010, 0x000000C0, 0x3 },

	{ 0x80009010, 0x000000C0, 0x3 },

	{ 0x00000018, 0x0000009D, 0x0 },

	{ 0x00000018, 0x0000009D, 0x0 },

	{ 0x80005012, 0x000000C0, 0x3 },

	{ 0x80005012, 0x000000C0, 0x3 },