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Commit 84e6aef0 authored by Sachin Kamat's avatar Sachin Kamat Committed by Kukjin Kim
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ARM: EXYNOS: Add DRM device to Origen



DRM core device and FIMD DRM platform device support is added to Origen board.

Signed-off-by: default avatarSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 023c9ff6
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+1 −0
Original line number Diff line number Diff line
@@ -324,6 +324,7 @@ config MACH_ORIGEN
	select S5P_DEV_USB_EHCI
	select SAMSUNG_DEV_BACKLIGHT
	select SAMSUNG_DEV_PWM
	select EXYNOS_DEV_DRM
	select EXYNOS4_DEV_DMA
	select EXYNOS4_DEV_USB_OHCI
	select EXYNOS4_SETUP_FIMD0
+31 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@
#include <mach/ohci.h>
#include <mach/map.h>

#include <drm/exynos_drm.h>
#include "common.h"

/* Following are default values for UCON, ULCON and UFCON UART registers */
@@ -583,6 +584,27 @@ static struct platform_device origen_lcd_hv070wsa = {
	.dev.platform_data	= &origen_lcd_hv070wsa_data,
};

#ifdef CONFIG_DRM_EXYNOS
static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
	.panel	= {
		.timing	= {
			.left_margin	= 64,
			.right_margin	= 16,
			.upper_margin	= 64,
			.lower_margin	= 16,
			.hsync_len	= 48,
			.vsync_len	= 3,
			.xres		= 1024,
			.yres		= 600,
		},
	},
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
				VIDCON1_INV_VCLK,
	.default_win	= 0,
	.bpp		= 32,
};
#else
static struct s3c_fb_pd_win origen_fb_win0 = {
	.win_mode = {
		.left_margin	= 64,
@@ -607,6 +629,7 @@ static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
				VIDCON1_INV_VCLK,
	.setup_gpio	= exynos4_fimd0_gpio_setup_24bpp,
};
#endif

/* Bluetooth rfkill gpio platform data */
static struct rfkill_gpio_platform_data origen_bt_pdata = {
@@ -646,6 +669,9 @@ static struct platform_device *origen_devices[] __initdata = {
	&s5p_device_mfc_l,
	&s5p_device_mfc_r,
	&s5p_device_mixer,
#ifdef CONFIG_DRM_EXYNOS
	&exynos_device_drm,
#endif
	&exynos4_device_ohci,
	&origen_device_gpiokeys,
	&origen_lcd_hv070wsa,
@@ -721,7 +747,12 @@ static void __init origen_machine_init(void)
	s5p_tv_setup();
	s5p_i2c_hdmiphy_set_platdata(NULL);

#ifdef CONFIG_DRM_EXYNOS
	s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
	exynos4_fimd0_gpio_setup_24bpp();
#else
	s5p_fimd0_set_platdata(&origen_lcd_pdata);
#endif

	platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));