Loading arch/powerpc/boot/dts/p1020rdb.dts +6 −6 Original line number Original line Diff line number Diff line /* /* * P1020 RDB Device Tree Source * P1020 RDB Device Tree Source * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -553,7 +553,7 @@ reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <16 2>; interrupts = <16 2>; Loading @@ -580,8 +580,8 @@ #address-cells = <3>; #address-cells = <3>; reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <16 2>; interrupts = <16 2>; Loading @@ -590,8 +590,8 @@ #size-cells = <2>; #size-cells = <2>; #address-cells = <3>; #address-cells = <3>; device_type = "pci"; device_type = "pci"; ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 Loading arch/powerpc/boot/dts/p2020rdb.dts +6 −6 Original line number Original line Diff line number Diff line /* /* * P2020 RDB Device Tree Source * P2020 RDB Device Tree Source * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -537,7 +537,7 @@ reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <25 2>; interrupts = <25 2>; Loading @@ -564,8 +564,8 @@ #address-cells = <3>; #address-cells = <3>; reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <26 2>; interrupts = <26 2>; Loading @@ -574,8 +574,8 @@ #size-cells = <2>; #size-cells = <2>; #address-cells = <3>; #address-cells = <3>; device_type = "pci"; device_type = "pci"; ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 Loading arch/powerpc/boot/dts/p2020rdb_camp_core0.dts +2 −2 Original line number Original line Diff line number Diff line Loading @@ -6,7 +6,7 @@ * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, * eth1, eth2, sdhc, crypto, global-util, pci0. * eth1, eth2, sdhc, crypto, global-util, pci0. * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -342,7 +342,7 @@ reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <25 2>; interrupts = <25 2>; Loading arch/powerpc/boot/dts/p2020rdb_camp_core1.dts +5 −5 Original line number Original line Diff line number Diff line Loading @@ -7,7 +7,7 @@ * * * Please note to add "-b 1" for core1's dts compiling. * Please note to add "-b 1" for core1's dts compiling. * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -162,8 +162,8 @@ #address-cells = <3>; #address-cells = <3>; reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <26 2>; interrupts = <26 2>; Loading @@ -172,8 +172,8 @@ #size-cells = <2>; #size-cells = <2>; #address-cells = <3>; #address-cells = <3>; device_type = "pci"; device_type = "pci"; ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 Loading drivers/edac/mpc85xx_edac.c +19 −8 Original line number Original line Diff line number Diff line Loading @@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = { static void __init mpc85xx_mc_clear_rfxe(void *data) static void __init mpc85xx_mc_clear_rfxe(void *data) { { orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000)); mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE)); } } #endif #endif static int __init mpc85xx_mc_init(void) static int __init mpc85xx_mc_init(void) { { int res = 0; int res = 0; u32 pvr = 0; printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, " printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, " "(C) 2006 Montavista Software\n"); "(C) 2006 Montavista Software\n"); Loading Loading @@ -1183,12 +1184,17 @@ static int __init mpc85xx_mc_init(void) #endif #endif #ifdef CONFIG_FSL_SOC_BOOKE #ifdef CONFIG_FSL_SOC_BOOKE pvr = mfspr(SPRN_PVR); if ((PVR_VER(pvr) == PVR_VER_E500V1) || (PVR_VER(pvr) == PVR_VER_E500V2)) { /* /* * need to clear HID1[RFXE] to disable machine check int * need to clear HID1[RFXE] to disable machine check int * so we can catch it * so we can catch it */ */ if (edac_op_state == EDAC_OPSTATE_INT) if (edac_op_state == EDAC_OPSTATE_INT) on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); } #endif #endif return 0; return 0; Loading @@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data) static void __exit mpc85xx_mc_exit(void) static void __exit mpc85xx_mc_exit(void) { { #ifdef CONFIG_FSL_SOC_BOOKE #ifdef CONFIG_FSL_SOC_BOOKE u32 pvr = mfspr(SPRN_PVR); if ((PVR_VER(pvr) == PVR_VER_E500V1) || (PVR_VER(pvr) == PVR_VER_E500V2)) { on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); } #endif #endif #ifdef CONFIG_PCI #ifdef CONFIG_PCI platform_driver_unregister(&mpc85xx_pci_err_driver); platform_driver_unregister(&mpc85xx_pci_err_driver); Loading Loading
arch/powerpc/boot/dts/p1020rdb.dts +6 −6 Original line number Original line Diff line number Diff line /* /* * P1020 RDB Device Tree Source * P1020 RDB Device Tree Source * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -553,7 +553,7 @@ reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <16 2>; interrupts = <16 2>; Loading @@ -580,8 +580,8 @@ #address-cells = <3>; #address-cells = <3>; reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <16 2>; interrupts = <16 2>; Loading @@ -590,8 +590,8 @@ #size-cells = <2>; #size-cells = <2>; #address-cells = <3>; #address-cells = <3>; device_type = "pci"; device_type = "pci"; ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 Loading
arch/powerpc/boot/dts/p2020rdb.dts +6 −6 Original line number Original line Diff line number Diff line /* /* * P2020 RDB Device Tree Source * P2020 RDB Device Tree Source * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -537,7 +537,7 @@ reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <25 2>; interrupts = <25 2>; Loading @@ -564,8 +564,8 @@ #address-cells = <3>; #address-cells = <3>; reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <26 2>; interrupts = <26 2>; Loading @@ -574,8 +574,8 @@ #size-cells = <2>; #size-cells = <2>; #address-cells = <3>; #address-cells = <3>; device_type = "pci"; device_type = "pci"; ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 Loading
arch/powerpc/boot/dts/p2020rdb_camp_core0.dts +2 −2 Original line number Original line Diff line number Diff line Loading @@ -6,7 +6,7 @@ * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, * eth1, eth2, sdhc, crypto, global-util, pci0. * eth1, eth2, sdhc, crypto, global-util, pci0. * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -342,7 +342,7 @@ reg = <0 0xffe09000 0 0x1000>; reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <25 2>; interrupts = <25 2>; Loading
arch/powerpc/boot/dts/p2020rdb_camp_core1.dts +5 −5 Original line number Original line Diff line number Diff line Loading @@ -7,7 +7,7 @@ * * * Please note to add "-b 1" for core1's dts compiling. * Please note to add "-b 1" for core1's dts compiling. * * * Copyright 2009 Freescale Semiconductor Inc. * Copyright 2009-2011 Freescale Semiconductor Inc. * * * This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the Loading Loading @@ -162,8 +162,8 @@ #address-cells = <3>; #address-cells = <3>; reg = <0 0xffe0a000 0 0x1000>; reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; bus-range = <0 255>; ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; clock-frequency = <33333333>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupt-parent = <&mpic>; interrupts = <26 2>; interrupts = <26 2>; Loading @@ -172,8 +172,8 @@ #size-cells = <2>; #size-cells = <2>; #address-cells = <3>; #address-cells = <3>; device_type = "pci"; device_type = "pci"; ranges = <0x2000000 0x0 0xc0000000 ranges = <0x2000000 0x0 0x80000000 0x2000000 0x0 0xc0000000 0x2000000 0x0 0x80000000 0x0 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 Loading
drivers/edac/mpc85xx_edac.c +19 −8 Original line number Original line Diff line number Diff line Loading @@ -1147,13 +1147,14 @@ static struct platform_driver mpc85xx_mc_err_driver = { static void __init mpc85xx_mc_clear_rfxe(void *data) static void __init mpc85xx_mc_clear_rfxe(void *data) { { orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000)); mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~HID1_RFXE)); } } #endif #endif static int __init mpc85xx_mc_init(void) static int __init mpc85xx_mc_init(void) { { int res = 0; int res = 0; u32 pvr = 0; printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, " printk(KERN_INFO "Freescale(R) MPC85xx EDAC driver, " "(C) 2006 Montavista Software\n"); "(C) 2006 Montavista Software\n"); Loading Loading @@ -1183,12 +1184,17 @@ static int __init mpc85xx_mc_init(void) #endif #endif #ifdef CONFIG_FSL_SOC_BOOKE #ifdef CONFIG_FSL_SOC_BOOKE pvr = mfspr(SPRN_PVR); if ((PVR_VER(pvr) == PVR_VER_E500V1) || (PVR_VER(pvr) == PVR_VER_E500V2)) { /* /* * need to clear HID1[RFXE] to disable machine check int * need to clear HID1[RFXE] to disable machine check int * so we can catch it * so we can catch it */ */ if (edac_op_state == EDAC_OPSTATE_INT) if (edac_op_state == EDAC_OPSTATE_INT) on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); } #endif #endif return 0; return 0; Loading @@ -1206,7 +1212,12 @@ static void __exit mpc85xx_mc_restore_hid1(void *data) static void __exit mpc85xx_mc_exit(void) static void __exit mpc85xx_mc_exit(void) { { #ifdef CONFIG_FSL_SOC_BOOKE #ifdef CONFIG_FSL_SOC_BOOKE u32 pvr = mfspr(SPRN_PVR); if ((PVR_VER(pvr) == PVR_VER_E500V1) || (PVR_VER(pvr) == PVR_VER_E500V2)) { on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); } #endif #endif #ifdef CONFIG_PCI #ifdef CONFIG_PCI platform_driver_unregister(&mpc85xx_pci_err_driver); platform_driver_unregister(&mpc85xx_pci_err_driver); Loading