Merge remote branch 'jwb/next' into next (83153203) · Commits · e / devices / android_kernel_oneplus_sm7250

arch/powerpc/boot/dts/canyonlands.dts

+24 −0

Original line number	Diff line number	Diff line
		@@ -172,6 +172,19 @@
		interrupts = <0x1e 4>;
		};

		USBOTG0: usbotg@bff80000 {
		compatible = "amcc,dwc-otg";
		reg = <0x4 0xbff80000 0x10000>;
		interrupt-parent = <&USBOTG0>;
		#interrupt-cells = <1>;
		#address-cells = <0>;
		#size-cells = <0>;
		interrupts = <0x0 0x1 0x2>;
		interrupt-map = </* USB-OTG */ 0x0 &UIC2 0x1c 0x4
		/* HIGH-POWER */ 0x1 &UIC1 0x1a 0x8
		/* DMA */ 0x2 &UIC0 0xc 0x4>;
		};

		SATA0: sata@bffd1000 {
		compatible = "amcc,sata-460ex";
		reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>;
		@@ -233,6 +246,11 @@
		};
		};

		cpld@2,0 {
		compatible = "amcc,ppc460ex-bcsr";
		reg = <2 0x0 0x9>;
		};

		ndfc@3,0 {
		compatible = "ibm,ndfc";
		reg = <0x00000003 0x00000000 0x00002000>;
		@@ -307,6 +325,12 @@
		interrupts = <0x3 0x4>;
		};

		GPIO0: gpio@ef600b00 {
		compatible = "ibm,ppc4xx-gpio";
		reg = <0xef600b00 0x00000048>;
		gpio-controller;
		};

		ZMII0: emac-zmii@ef600d00 {
		compatible = "ibm,zmii-460ex", "ibm,zmii";
		reg = <0xef600d00 0x0000000c>;

+2 −1

Original line number	Diff line number	Diff line
		@@ -154,6 +154,7 @@ extern const char *powerpc_base_platform;
		#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000)
		#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000)
		#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000)
		#define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000)
		#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
		#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
		#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000)
		@@ -465,7 +466,7 @@ enum {
		CPU_FTRS_44X \| CPU_FTRS_440x6 \|
		#endif
		#ifdef CONFIG_PPC_47x
		CPU_FTRS_47X \|
		CPU_FTRS_47X \| CPU_FTR_476_DD2 \|
		#endif
		#ifdef CONFIG_E200
		CPU_FTRS_E200 \|

+18 −4

Original line number	Diff line number	Diff line
		@@ -1811,11 +1811,11 @@ static struct cpu_spec __initdata cpu_specs[] = {
		.machine_check = machine_check_440A,
		.platform = "ppc440",
		},
		{ /* 476 core */
		.pvr_mask = 0xffff0000,
		.pvr_value = 0x11a50000,
		{ /* 476 DD2 core */
		.pvr_mask = 0xffffffff,
		.pvr_value = 0x11a52080,
		.cpu_name = "476",
		.cpu_features = CPU_FTRS_47X,
		.cpu_features = CPU_FTRS_47X \| CPU_FTR_476_DD2,
		.cpu_user_features = COMMON_USER_BOOKE \|
		PPC_FEATURE_HAS_FPU,
		.mmu_features = MMU_FTR_TYPE_47x \|
		@@ -1839,6 +1839,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
		.machine_check = machine_check_47x,
		.platform = "ppc470",
		},
		{ /* 476 others */
		.pvr_mask = 0xffff0000,
		.pvr_value = 0x11a50000,
		.cpu_name = "476",
		.cpu_features = CPU_FTRS_47X,
		.cpu_user_features = COMMON_USER_BOOKE \|
		PPC_FEATURE_HAS_FPU,
		.mmu_features = MMU_FTR_TYPE_47x \|
		MMU_FTR_USE_TLBIVAX_BCAST \| MMU_FTR_LOCK_BCAST_INVAL,
		.icache_bsize = 32,
		.dcache_bsize = 128,
		.machine_check = machine_check_47x,
		.platform = "ppc470",
		},
		{ /* default match */
		.pvr_mask = 0x00000000,
		.pvr_value = 0x00000000,

+35 −0

Original line number	Diff line number	Diff line
		@@ -189,6 +189,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
		blr

		#ifdef CONFIG_PPC_47x

		/*
		* 47x variant of icbt
		*/
		# define ICBT(CT,RA,RB) \
		.long 0x7c00002c \| ((CT) << 21) \| ((RA) << 16) \| ((RB) << 11)

		/*
		* _tlbivax_bcast is only on 47x. We don't bother doing a runtime
		* check though, it will blow up soon enough if we mistakenly try
		@@ -206,7 +213,35 @@ _GLOBAL(_tlbivax_bcast)
		isync
		eieio
		tlbsync
		BEGIN_FTR_SECTION
		b 1f
		END_FTR_SECTION_IFSET(CPU_FTR_476_DD2)
		sync
		wrtee r10
		blr
		/*
		* DD2 HW could hang if in instruction fetch happens before msync completes.
		* Touch enough instruction cache lines to ensure cache hits
		*/
		1: mflr r9
		bl 2f
		2: mflr r6
		li r7,32
		ICBT(0,r6,r7) /* touch next cache line */
		add r6,r6,r7
		ICBT(0,r6,r7) /* touch next cache line */
		add r6,r6,r7
		ICBT(0,r6,r7) /* touch next cache line */
		sync
		nop
		nop
		nop
		nop
		nop
		nop
		nop
		nop
		mtlr r9
		wrtee r10
		blr
		#endif /* CONFIG_PPC_47x */

+4 −0

Original line number	Diff line number	Diff line
		@@ -4,4 +4,8 @@
		extern u8 as1_readb(volatile u8 __iomem *addr);
		extern void as1_writeb(u8 data, volatile u8 __iomem *addr);

		#define GPIO0_OSRH 0xC
		#define GPIO0_TSRH 0x14
		#define GPIO0_ISR1H 0x34

		#endif /* __POWERPC_PLATFORMS_44X_44X_H */