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Commit 82f499c8 authored by Marc Zyngier's avatar Marc Zyngier Committed by Thomas Gleixner
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irqchip/gic-v3-its: Fix reprogramming of redistributors on CPU hotplug



Enabling LPIs was made a lot stricter recently, by checking that they are
disabled before enabling them. By doing so, the CPU hotplug case was missed
altogether, which leaves LPIs enabled on hotplug off (expecting the CPU to
eventually come back), and won't write a different value anyway on hotplug
on.

So skip that check if that particular case is detected

Fixes: 6eb486b6 ("irqchip/gic-v3: Ensure GICR_CTLR.EnableLPI=0 is observed before enabling")
Reported-by: default avatarSumit Garg <sumit.garg@linaro.org>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarSumit Garg <sumit.garg@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lkml.kernel.org/r/20180622095254.5906-8-marc.zyngier@arm.com
parent 205e065d
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Original line number Diff line number Diff line
@@ -3427,6 +3427,16 @@ static int redist_disable_lpis(void)
	u64 timeout = USEC_PER_SEC;
	u64 val;

	/*
	 * If coming via a CPU hotplug event, we don't need to disable
	 * LPIs before trying to re-enable them. They are already
	 * configured and all is well in the world. Detect this case
	 * by checking the allocation of the pending table for the
	 * current CPU.
	 */
	if (gic_data_rdist()->pend_page)
		return 0;

	if (!gic_rdists_supports_plpis()) {
		pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
		return -ENXIO;