Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 82215510 authored by David Daney's avatar David Daney Committed by Bjorn Helgaas
Browse files

PCI: Mark Cavium CN8xxx to avoid bus reset 



Root ports of cn8xxx do not function after bus reset when used with some
e1000e and LSI HBA devices.  Add a quirk to prevent bus reset on these root
ports.

Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
[jglauber@cavium.com: fixed typo and whitespaces]
Signed-off-by: default avatarJan Glauber <jglauber@cavium.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarAlex Williamson <alex.williamson@redhat.com>
parent 9e66317d

drivers/pci/quirks.c

+7 −0
Original line number Diff line number Diff line
@@ -3365,6 +3365,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset); 
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);



/*

 * Root port on some Cavium CN8xxx chips do not successfully complete a bus

 * reset when used with certain child devices.  After the reset, config

 * accesses to the child may fail.

 */

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);



static void quirk_no_pm_reset(struct pci_dev *dev)

{

	/*