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Commit 81d873cb authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Update Superspeed PHY init sequence for kona"

parents 6a1ef27d ea74683f

arch/arm64/boot/dts/qcom/kona-usb.dtsi

+19 −19
Original line number Diff line number Diff line
@@ -209,7 +209,7 @@ 
			USB3_DP_QSERDES_TXA_RES_CODE_LANE_OFFSET_RX 0x05 0

			USB3_DP_QSERDES_TXA_LANE_MODE_1 0xD5 0

			USB3_DP_QSERDES_TXA_RCV_DETECT_LVL_2 0x12 0

			USB3_DP_QSERDES_TXA_PI_QEC_CTRL 0x20 0

			USB3_DP_QSERDES_TXA_PI_QEC_CTRL 0x54 0

			USB3_DP_QSERDES_RXA_UCDR_SO_GAIN 0x05 0

			USB3_DP_QSERDES_RXA_UCDR_FASTLOCK_FO_GAIN 0x2F 0

			USB3_DP_QSERDES_RXA_UCDR_SO_SATURATION_AND_ENABLE 0x7F 0
@@ -230,16 +230,16 @@ 
			USB3_DP_QSERDES_RXA_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0

			USB3_DP_QSERDES_RXA_SIGDET_CNTRL 0x04 0

			USB3_DP_QSERDES_RXA_SIGDET_DEGLITCH_CNTRL 0x0E 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_LOW 0xBF 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH 0xBF 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH2 0x3F 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH3 0x7F 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH4 0x94 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_LOW 0x7F 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH 0x7F 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH2 0xB7 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH3 0xFF 0

			USB3_DP_QSERDES_RXA_RX_MODE_00_HIGH4 0xB8 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_LOW 0xDC 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH 0xDC 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH2 0x5C 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH3 0x0B 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH4 0xB3 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH3 0x7B 0

			USB3_DP_QSERDES_RXA_RX_MODE_01_HIGH4 0xB4 0

			USB3_DP_QSERDES_RXA_DFE_EN_TIMER 0x04 0

			USB3_DP_QSERDES_RXA_DFE_CTLE_POST_CAL_OFFSET 0x38 0

			USB3_DP_QSERDES_RXA_AUX_DATA_TCOARSE_TFINE 0xA0 0
@@ -252,7 +252,7 @@ 
			USB3_DP_QSERDES_TXB_RES_CODE_LANE_OFFSET_RX 0x05 0

			USB3_DP_QSERDES_TXB_LANE_MODE_1 0xD5 0

			USB3_DP_QSERDES_TXB_RCV_DETECT_LVL_2 0x12 0

			USB3_DP_QSERDES_TXB_PI_QEC_CTRL 0x20 0

			USB3_DP_QSERDES_TXB_PI_QEC_CTRL 0x54 0

			USB3_DP_QSERDES_RXB_UCDR_SO_GAIN 0x05 0

			USB3_DP_QSERDES_RXB_UCDR_FASTLOCK_FO_GAIN 0x2F 0

			USB3_DP_QSERDES_RXB_UCDR_SO_SATURATION_AND_ENABLE 0x7F 0
@@ -273,16 +273,16 @@ 
			USB3_DP_QSERDES_RXB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x77 0

			USB3_DP_QSERDES_RXB_SIGDET_CNTRL 0x04 0

			USB3_DP_QSERDES_RXB_SIGDET_DEGLITCH_CNTRL 0x0E 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_LOW 0xBF 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH 0xBF 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH2 0x3F 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH3 0x7F 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH4 0x94 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_LOW 0x7F 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH 0x7F 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH2 0xB7 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH3 0xFF 0

			USB3_DP_QSERDES_RXB_RX_MODE_00_HIGH4 0xB8 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_LOW 0xDC 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH 0xDC 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH2 0x5C 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH3 0x0B 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH4 0xB3 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH3 0x7B 0

			USB3_DP_QSERDES_RXB_RX_MODE_01_HIGH4 0xB4 0

			USB3_DP_QSERDES_RXB_DFE_EN_TIMER 0x04 0

			USB3_DP_QSERDES_RXB_DFE_CTLE_POST_CAL_OFFSET 0x38 0

			USB3_DP_QSERDES_RXB_AUX_DATA_TCOARSE_TFINE 0xA0 0
@@ -527,7 +527,7 @@ 
		     USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_COUNT_LOW 0xff 0

		     USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_COUNT_HIGH 0x0f 0

		     USB3_UNI_QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE 0x7f 0

		     USB3_UNI_QSERDES_RX_UCDR_FO_GAIN 0x0a 0

		     USB3_UNI_QSERDES_RX_UCDR_FO_GAIN 0x08 0

		     USB3_UNI_QSERDES_RX_VGA_CAL_CNTRL1 0x54 0

		     USB3_UNI_QSERDES_RX_VGA_CAL_CNTRL2 0x0c 0

		     USB3_UNI_QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2 0x0f 0
@@ -541,12 +541,12 @@ 
		     USB3_UNI_QSERDES_RX_RX_IDAC_TSETTLE_HIGH 0x00 0

		     USB3_UNI_QSERDES_RX_RX_IDAC_TSETTLE_LOW 0xc0 0

		     USB3_UNI_QSERDES_RX_DFE_CTLE_POST_CAL_OFFSET 0x38 0

		     USB3_UNI_QSERDES_RX_UCDR_SO_GAIN 0x06 0

		     USB3_UNI_QSERDES_RX_UCDR_SO_GAIN 0x04 0

		     USB3_UNI_QSERDES_RX_DCC_CTRL1 0x0c 0

		     USB3_UNI_QSERDES_RX_GM_CAL 0x1f 0

		     USB3_UNI_QSERDES_TX_RCV_DETECT_LVL_2 0x12 0

		     USB3_UNI_QSERDES_TX_LANE_MODE_1 0xd5 0

		     USB3_UNI_QSERDES_TX_PI_QEC_CTRL 0x54 0

		     USB3_UNI_QSERDES_TX_PI_QEC_CTRL 0x40 0

		     USB3_UNI_QSERDES_TX_RES_CODE_LANE_OFFSET_TX 0x08 0

		     USB3_UNI_PCS_LOCK_DETECT_CONFIG1 0xd0 0

		     USB3_UNI_PCS_LOCK_DETECT_CONFIG2 0x07 0