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Commit 81984428 authored by Alastair D'Silva's avatar Alastair D'Silva Committed by Michael Ellerman
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powerpc: Add TIDR CPU feature for POWER9



This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.

Signed-off-by: default avatarAlastair D'Silva <alastair@d-silva.org>
Reviewed-by: default avatarFrederic Barrat <fbarrat@linux.vnet.ibm.com>
Reviewed-by: default avatarAndrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 56c0b48b
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+2 −1
Original line number Diff line number Diff line
@@ -215,6 +215,7 @@ static inline void cpu_feature_keys_init(void) { }
#define CPU_FTR_P9_TM_HV_ASSIST		LONG_ASM_CONST(0x0000100000000000)
#define CPU_FTR_P9_TM_XER_SO_BUG	LONG_ASM_CONST(0x0000200000000000)
#define CPU_FTR_P9_TLBIE_BUG		LONG_ASM_CONST(0x0000400000000000)
#define CPU_FTR_P9_TIDR			LONG_ASM_CONST(0x0000800000000000)

#ifndef __ASSEMBLY__

@@ -462,7 +463,7 @@ static inline void cpu_feature_keys_init(void) { }
	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
	    CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
	    CPU_FTR_P9_TLBIE_BUG)
	    CPU_FTR_P9_TLBIE_BUG | CPU_FTR_P9_TIDR)
#define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
			     (~CPU_FTR_SAO))
#define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
+1 −0
Original line number Diff line number Diff line
@@ -717,6 +717,7 @@ static __init void cpufeatures_cpu_quirks(void)
	if ((version & 0xffff0000) == 0x004e0000) {
		cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
		cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
		cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
	}

	/*