Loading msm/vidc/msm_vidc_clocks.c +8 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,8 @@ struct msm_vidc_core_ops core_ops_ar50lt = { .calc_freq = msm_vidc_calc_freq_ar50, .decide_work_route = NULL, .decide_work_mode = msm_vidc_decide_work_mode_ar50, .decide_core_and_power_mode = NULL, .decide_core_and_power_mode = msm_vidc_decide_core_and_power_mode_ar50lt, .calc_bw = calc_bw_ar50lt, }; Loading Loading @@ -1612,6 +1613,12 @@ static u32 get_core_load(struct msm_vidc_core *core, return load; } int msm_vidc_decide_core_and_power_mode_ar50lt(struct msm_vidc_inst *inst) { inst->clk_data.core_id = VIDC_CORE_ID_1; return 0; } int msm_vidc_decide_core_and_power_mode_iris1(struct msm_vidc_inst *inst) { bool enable = false; Loading msm/vidc/msm_vidc_clocks.h +1 −0 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ int msm_vidc_decide_work_route_iris1(struct msm_vidc_inst *inst); int msm_vidc_decide_work_mode_iris1(struct msm_vidc_inst *inst); int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst *inst); int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst *inst); int msm_vidc_decide_core_and_power_mode_ar50lt(struct msm_vidc_inst *inst); int msm_vidc_decide_core_and_power_mode_iris1(struct msm_vidc_inst *inst); int msm_vidc_decide_core_and_power_mode_iris2(struct msm_vidc_inst *inst); void msm_print_core_status(struct msm_vidc_core *core, u32 core_id, u32 sid); Loading msm/vidc/msm_vidc_platform.c +1 −1 Original line number Diff line number Diff line Loading @@ -833,7 +833,7 @@ static struct msm_vidc_common_data sm6150_common_data[] = { }, { .key = "qcom,fw-vpp-cycles", .value = 225975, .value = 166666, }, }; Loading Loading
msm/vidc/msm_vidc_clocks.c +8 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,8 @@ struct msm_vidc_core_ops core_ops_ar50lt = { .calc_freq = msm_vidc_calc_freq_ar50, .decide_work_route = NULL, .decide_work_mode = msm_vidc_decide_work_mode_ar50, .decide_core_and_power_mode = NULL, .decide_core_and_power_mode = msm_vidc_decide_core_and_power_mode_ar50lt, .calc_bw = calc_bw_ar50lt, }; Loading Loading @@ -1612,6 +1613,12 @@ static u32 get_core_load(struct msm_vidc_core *core, return load; } int msm_vidc_decide_core_and_power_mode_ar50lt(struct msm_vidc_inst *inst) { inst->clk_data.core_id = VIDC_CORE_ID_1; return 0; } int msm_vidc_decide_core_and_power_mode_iris1(struct msm_vidc_inst *inst) { bool enable = false; Loading
msm/vidc/msm_vidc_clocks.h +1 −0 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ int msm_vidc_decide_work_route_iris1(struct msm_vidc_inst *inst); int msm_vidc_decide_work_mode_iris1(struct msm_vidc_inst *inst); int msm_vidc_decide_work_route_iris2(struct msm_vidc_inst *inst); int msm_vidc_decide_work_mode_iris2(struct msm_vidc_inst *inst); int msm_vidc_decide_core_and_power_mode_ar50lt(struct msm_vidc_inst *inst); int msm_vidc_decide_core_and_power_mode_iris1(struct msm_vidc_inst *inst); int msm_vidc_decide_core_and_power_mode_iris2(struct msm_vidc_inst *inst); void msm_print_core_status(struct msm_vidc_core *core, u32 core_id, u32 sid); Loading
msm/vidc/msm_vidc_platform.c +1 −1 Original line number Diff line number Diff line Loading @@ -833,7 +833,7 @@ static struct msm_vidc_common_data sm6150_common_data[] = { }, { .key = "qcom,fw-vpp-cycles", .value = 225975, .value = 166666, }, }; Loading