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Commit 80d4bb51 authored by John Stultz's avatar John Stultz
Browse files

RTC: Cleanup rtc_class_ops->irq_set_state



With PIE mode interrupts now emulated in generic code via an hrtimer,
no one calls rtc_class_ops->irq_set_state(), so this patch removes it
along with driver implementations.

CC: Thomas Gleixner <tglx@linutronix.de>
CC: Alessandro Zummo <a.zummo@towertech.it>
CC: Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br>
CC: rtc-linux@googlegroups.com
Signed-off-by: default avatarJohn Stultz <john.stultz@linaro.org>
parent f44f7f96
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+0 −20
Original line number Diff line number Diff line
@@ -400,25 +400,6 @@ static int cmos_irq_set_freq(struct device *dev, int freq)
	return 0;
}

static int cmos_irq_set_state(struct device *dev, int enabled)
{
	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
	unsigned long	flags;

	if (!is_valid_irq(cmos->irq))
		return -ENXIO;

	spin_lock_irqsave(&rtc_lock, flags);

	if (enabled)
		cmos_irq_enable(cmos, RTC_PIE);
	else
		cmos_irq_disable(cmos, RTC_PIE);

	spin_unlock_irqrestore(&rtc_lock, flags);
	return 0;
}

static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
@@ -502,7 +483,6 @@ static const struct rtc_class_ops cmos_rtc_ops = {
	.set_alarm		= cmos_set_alarm,
	.proc			= cmos_procfs,
	.irq_set_freq		= cmos_irq_set_freq,
	.irq_set_state		= cmos_irq_set_state,
	.alarm_irq_enable	= cmos_alarm_irq_enable,
	.update_irq_enable	= cmos_update_irq_enable,
};
+0 −34
Original line number Diff line number Diff line
@@ -473,39 +473,6 @@ static int davinci_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
	return 0;
}

static int davinci_rtc_irq_set_state(struct device *dev, int enabled)
{
	struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
	unsigned long flags;
	u8 rtc_ctrl;

	spin_lock_irqsave(&davinci_rtc_lock, flags);

	rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);

	if (enabled) {
		while (rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL)
		       & PRTCSS_RTC_CTRL_WDTBUS)
			cpu_relax();

		rtc_ctrl |= PRTCSS_RTC_CTRL_TE;
		rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);

		rtcss_write(davinci_rtc, 0x0, PRTCSS_RTC_CLKC_CNT);

		rtc_ctrl |= PRTCSS_RTC_CTRL_TIEN |
			    PRTCSS_RTC_CTRL_TMMD |
			    PRTCSS_RTC_CTRL_TMRFLG;
	} else
		rtc_ctrl &= ~PRTCSS_RTC_CTRL_TIEN;

	rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);

	spin_unlock_irqrestore(&davinci_rtc_lock, flags);

	return 0;
}

static int davinci_rtc_irq_set_freq(struct device *dev, int freq)
{
	struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
@@ -529,7 +496,6 @@ static struct rtc_class_ops davinci_rtc_ops = {
	.alarm_irq_enable	= davinci_rtc_alarm_irq_enable,
	.read_alarm		= davinci_rtc_read_alarm,
	.set_alarm		= davinci_rtc_set_alarm,
	.irq_set_state		= davinci_rtc_irq_set_state,
	.irq_set_freq		= davinci_rtc_irq_set_freq,
};

+0 −20
Original line number Diff line number Diff line
@@ -236,25 +236,6 @@ static int mrst_set_alarm(struct device *dev, struct rtc_wkalrm *t)
	return 0;
}

static int mrst_irq_set_state(struct device *dev, int enabled)
{
	struct mrst_rtc	*mrst = dev_get_drvdata(dev);
	unsigned long	flags;

	if (!mrst->irq)
		return -ENXIO;

	spin_lock_irqsave(&rtc_lock, flags);

	if (enabled)
		mrst_irq_enable(mrst, RTC_PIE);
	else
		mrst_irq_disable(mrst, RTC_PIE);

	spin_unlock_irqrestore(&rtc_lock, flags);
	return 0;
}

/* Currently, the vRTC doesn't support UIE ON/OFF */
static int mrst_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
@@ -301,7 +282,6 @@ static const struct rtc_class_ops mrst_rtc_ops = {
	.read_alarm	= mrst_read_alarm,
	.set_alarm	= mrst_set_alarm,
	.proc		= mrst_procfs,
	.irq_set_state	= mrst_irq_set_state,
	.alarm_irq_enable = mrst_rtc_alarm_irq_enable,
};

+0 −34
Original line number Diff line number Diff line
@@ -293,38 +293,6 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
	return ret;
}

/* Periodic interrupt is only available in ST variants. */
static int pl031_irq_set_state(struct device *dev, int enabled)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	if (enabled == 1) {
		/* Clear any pending timer interrupt. */
		writel(RTC_BIT_PI, ldata->base + RTC_ICR);

		writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
			ldata->base + RTC_IMSC);

		/* Now start the timer */
		writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
			ldata->base + RTC_TCR);

	} else {
		writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
			ldata->base + RTC_IMSC);

		/* Also stop the timer */
		writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
			ldata->base + RTC_TCR);
	}
	/* Wait at least 1 RTC32 clock cycle to ensure next access
	 * to RTC_TCR will succeed.
	 */
	udelay(40);

	return 0;
}

static int pl031_irq_set_freq(struct device *dev, int freq)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
@@ -440,7 +408,6 @@ static struct rtc_class_ops stv1_pl031_ops = {
	.read_alarm = pl031_read_alarm,
	.set_alarm = pl031_set_alarm,
	.alarm_irq_enable = pl031_alarm_irq_enable,
	.irq_set_state = pl031_irq_set_state,
	.irq_set_freq = pl031_irq_set_freq,
};

@@ -451,7 +418,6 @@ static struct rtc_class_ops stv2_pl031_ops = {
	.read_alarm = pl031_stv2_read_alarm,
	.set_alarm = pl031_stv2_set_alarm,
	.alarm_irq_enable = pl031_alarm_irq_enable,
	.irq_set_state = pl031_irq_set_state,
	.irq_set_freq = pl031_irq_set_freq,
};

+0 −13
Original line number Diff line number Diff line
@@ -223,18 +223,6 @@ static int pxa_periodic_irq_set_freq(struct device *dev, int freq)
	return 0;
}

static int pxa_periodic_irq_set_state(struct device *dev, int enabled)
{
	struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);

	if (enabled)
		rtsr_set_bits(pxa_rtc, RTSR_PIALE | RTSR_PICE);
	else
		rtsr_clear_bits(pxa_rtc, RTSR_PIALE | RTSR_PICE);

	return 0;
}

static int pxa_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
@@ -348,7 +336,6 @@ static const struct rtc_class_ops pxa_rtc_ops = {
	.alarm_irq_enable = pxa_alarm_irq_enable,
	.update_irq_enable = pxa_update_irq_enable,
	.proc = pxa_rtc_proc,
	.irq_set_state = pxa_periodic_irq_set_state,
	.irq_set_freq = pxa_periodic_irq_set_freq,
};

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