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Commit 7fcdf327 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6

parents f7dd16bf 2c74088e
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+4 −2
Original line number Original line Diff line number Diff line
@@ -910,16 +910,18 @@ core99_gmac_phy_reset(struct device_node *node, long param, long value)
	    macio->type != macio_intrepid)
	    macio->type != macio_intrepid)
		return -ENODEV;
		return -ENODEV;


	printk(KERN_DEBUG "Hard reset of PHY chip ...\n");

	LOCK(flags);
	LOCK(flags);
	MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
	MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
	(void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
	(void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
	UNLOCK(flags);
	UNLOCK(flags);
	mdelay(10);
	msleep(10);
	LOCK(flags);
	LOCK(flags);
	MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
	MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
		KEYLARGO_GPIO_OUTOUT_DATA);
		KEYLARGO_GPIO_OUTOUT_DATA);
	UNLOCK(flags);
	UNLOCK(flags);
	mdelay(10);
	msleep(10);


	return 0;
	return 0;
}
}
+30 −25
Original line number Original line Diff line number Diff line
@@ -1653,36 +1653,40 @@ static void gem_init_rings(struct gem *gp)
/* Init PHY interface and start link poll state machine */
/* Init PHY interface and start link poll state machine */
static void gem_init_phy(struct gem *gp)
static void gem_init_phy(struct gem *gp)
{
{
	u32 mifcfg;
	u32 mif_cfg;


	/* Revert MIF CFG setting done on stop_phy */
	/* Revert MIF CFG setting done on stop_phy */
	mifcfg = readl(gp->regs + MIF_CFG);
	mif_cfg = readl(gp->regs + MIF_CFG);
	mifcfg &= ~MIF_CFG_BBMODE;
	mif_cfg &= ~(MIF_CFG_PSELECT|MIF_CFG_POLL|MIF_CFG_BBMODE|MIF_CFG_MDI1);
	writel(mifcfg, gp->regs + MIF_CFG);
	mif_cfg |= MIF_CFG_MDI0;
	writel(mif_cfg, gp->regs + MIF_CFG);
	writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE);
	writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG);
	
	
	if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) {
	if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) {
		int i;
		int i;
		u16 ctrl;


		/* Those delay sucks, the HW seem to love them though, I'll
		 * serisouly consider breaking some locks here to be able
		 * to schedule instead
		 */
		for (i = 0; i < 3; i++) {
#ifdef CONFIG_PPC_PMAC
#ifdef CONFIG_PPC_PMAC
		pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0);
		pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0);
			msleep(20);
#endif
#endif
			/* Some PHYs used by apple have problem getting back to us,

			 * we do an additional reset here
		/* Some PHYs used by apple have problem getting back
		 * to us, we do an additional reset here
		 */
		 */
		phy_write(gp, MII_BMCR, BMCR_RESET);
		phy_write(gp, MII_BMCR, BMCR_RESET);
			msleep(20);
		for (i = 0; i < 50; i++) {
			if (phy_read(gp, MII_BMCR) != 0xffff)
			if ((phy_read(gp, MII_BMCR) & BMCR_RESET) == 0)
				break;
				break;
			if (i == 2)
			msleep(10);
		}
		if (i == 50)
			printk(KERN_WARNING "%s: GMAC PHY not responding !\n",
			printk(KERN_WARNING "%s: GMAC PHY not responding !\n",
			       gp->dev->name);
			       gp->dev->name);
		}
		/* Make sure isolate is off */
		ctrl = phy_read(gp, MII_BMCR);
		if (ctrl & BMCR_ISOLATE)
			phy_write(gp, MII_BMCR, ctrl & ~BMCR_ISOLATE);
	}
	}


	if (gp->pdev->vendor == PCI_VENDOR_ID_SUN &&
	if (gp->pdev->vendor == PCI_VENDOR_ID_SUN &&
@@ -2119,7 +2123,7 @@ static void gem_reinit_chip(struct gem *gp)
/* Must be invoked with no lock held. */
/* Must be invoked with no lock held. */
static void gem_stop_phy(struct gem *gp, int wol)
static void gem_stop_phy(struct gem *gp, int wol)
{
{
	u32 mifcfg;
	u32 mif_cfg;
	unsigned long flags;
	unsigned long flags;


	/* Let the chip settle down a bit, it seems that helps
	/* Let the chip settle down a bit, it seems that helps
@@ -2130,9 +2134,9 @@ static void gem_stop_phy(struct gem *gp, int wol)
	/* Make sure we aren't polling PHY status change. We
	/* Make sure we aren't polling PHY status change. We
	 * don't currently use that feature though
	 * don't currently use that feature though
	 */
	 */
	mifcfg = readl(gp->regs + MIF_CFG);
	mif_cfg = readl(gp->regs + MIF_CFG);
	mifcfg &= ~MIF_CFG_POLL;
	mif_cfg &= ~MIF_CFG_POLL;
	writel(mifcfg, gp->regs + MIF_CFG);
	writel(mif_cfg, gp->regs + MIF_CFG);


	if (wol && gp->has_wol) {
	if (wol && gp->has_wol) {
		unsigned char *e = &gp->dev->dev_addr[0];
		unsigned char *e = &gp->dev->dev_addr[0];
@@ -2182,7 +2186,8 @@ static void gem_stop_phy(struct gem *gp, int wol)
		/* According to Apple, we must set the MDIO pins to this begnign
		/* According to Apple, we must set the MDIO pins to this begnign
		 * state or we may 1) eat more current, 2) damage some PHYs
		 * state or we may 1) eat more current, 2) damage some PHYs
		 */
		 */
		writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
		mif_cfg = 0;
		writel(mif_cfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
		writel(0, gp->regs + MIF_BBCLK);
		writel(0, gp->regs + MIF_BBCLK);
		writel(0, gp->regs + MIF_BBDATA);
		writel(0, gp->regs + MIF_BBDATA);
		writel(0, gp->regs + MIF_BBOENAB);
		writel(0, gp->regs + MIF_BBOENAB);
+15 −1
Original line number Original line Diff line number Diff line
@@ -19,7 +19,21 @@ struct xt_get_revision
/* For standard target */
/* For standard target */
#define XT_RETURN (-NF_REPEAT - 1)
#define XT_RETURN (-NF_REPEAT - 1)


#define XT_ALIGN(s) (((s) + (__alignof__(u_int64_t)-1)) & ~(__alignof__(u_int64_t)-1))
/* this is a dummy structure to find out the alignment requirement for a struct
 * containing all the fundamental data types that are used in ipt_entry,
 * ip6t_entry and arpt_entry.  This sucks, and it is a hack.  It will be my
 * personal pleasure to remove it -HW
 */
struct _xt_align
{
	u_int8_t u8;
	u_int16_t u16;
	u_int32_t u32;
	u_int64_t u64;
};

#define XT_ALIGN(s) (((s) + (__alignof__(struct _xt_align)-1)) 	\
			& ~(__alignof__(struct _xt_align)-1))


/* Standard return verdict, or do jump. */
/* Standard return verdict, or do jump. */
#define XT_STANDARD_TARGET ""
#define XT_STANDARD_TARGET ""
+3 −2
Original line number Original line Diff line number Diff line
@@ -2543,13 +2543,14 @@ int dev_ioctl(unsigned int cmd, void __user *arg)
		case SIOCBONDENSLAVE:
		case SIOCBONDENSLAVE:
		case SIOCBONDRELEASE:
		case SIOCBONDRELEASE:
		case SIOCBONDSETHWADDR:
		case SIOCBONDSETHWADDR:
		case SIOCBONDSLAVEINFOQUERY:
		case SIOCBONDINFOQUERY:
		case SIOCBONDCHANGEACTIVE:
		case SIOCBONDCHANGEACTIVE:
		case SIOCBRADDIF:
		case SIOCBRADDIF:
		case SIOCBRDELIF:
		case SIOCBRDELIF:
			if (!capable(CAP_NET_ADMIN))
			if (!capable(CAP_NET_ADMIN))
				return -EPERM;
				return -EPERM;
			/* fall through */
		case SIOCBONDSLAVEINFOQUERY:
		case SIOCBONDINFOQUERY:
			dev_load(ifr.ifr_name);
			dev_load(ifr.ifr_name);
			rtnl_lock();
			rtnl_lock();
			ret = dev_ifsioc(&ifr, cmd);
			ret = dev_ifsioc(&ifr, cmd);
+5 −3
Original line number Original line Diff line number Diff line
@@ -135,13 +135,15 @@ void skb_under_panic(struct sk_buff *skb, int sz, void *here)
struct sk_buff *__alloc_skb(unsigned int size, gfp_t gfp_mask,
struct sk_buff *__alloc_skb(unsigned int size, gfp_t gfp_mask,
			    int fclone)
			    int fclone)
{
{
	kmem_cache_t *cache;
	struct skb_shared_info *shinfo;
	struct skb_shared_info *shinfo;
	struct sk_buff *skb;
	struct sk_buff *skb;
	u8 *data;
	u8 *data;


	cache = fclone ? skbuff_fclone_cache : skbuff_head_cache;

	/* Get the HEAD */
	/* Get the HEAD */
	skb = kmem_cache_alloc(fclone ? skbuff_fclone_cache : skbuff_head_cache,
	skb = kmem_cache_alloc(cache, gfp_mask & ~__GFP_DMA);
				gfp_mask & ~__GFP_DMA);
	if (!skb)
	if (!skb)
		goto out;
		goto out;


@@ -180,7 +182,7 @@ struct sk_buff *__alloc_skb(unsigned int size, gfp_t gfp_mask,
out:
out:
	return skb;
	return skb;
nodata:
nodata:
	kmem_cache_free(skbuff_head_cache, skb);
	kmem_cache_free(cache, skb);
	skb = NULL;
	skb = NULL;
	goto out;
	goto out;
}
}
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