Merge 0c9b2409d7350bac52adf1ed37f7ed7d8c7f06d9 on remote branch (7fc80fba) · Commits · e / devices / android_kernel_oneplus_sm7250

dp/inc/cdp_txrx_cmn.h

+4 −1

Original line number	Diff line number	Diff line
		@@ -2557,6 +2557,9 @@ cdp_rx_get_pending(ol_txrx_soc_handle soc)
		!soc->ol_ops->dp_rx_get_pending)
		return 0;

		if (cdp_cfg_get(soc, cfg_dp_wow_check_rx_pending))
		return soc->ol_ops->dp_rx_get_pending(soc);
		else
		return 0;
		}
		#endif /* _CDP_TXRX_CMN_H_ */

dp/inc/cdp_txrx_cmn_struct.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -2239,6 +2239,7 @@ struct cdp_monitor_filter {
		* @cfg_dp_ce_classify_enable: get CE classify enable config
		* @cfg_dp_disable_intra_bss_fwd: get intra bss fwd config
		* @cfg_dp_pktlog_buffer_size: get packet log buffer size config
		* @cfg_dp_wow_check_rx_pending: get wow rx pending frame check config
		*/
		enum cdp_dp_cfg {
		cfg_dp_enable_data_stall,
		@@ -2260,6 +2261,7 @@ enum cdp_dp_cfg {
		cfg_dp_ce_classify_enable,
		cfg_dp_disable_intra_bss_fwd,
		cfg_dp_pktlog_buffer_size,
		cfg_dp_wow_check_rx_pending,
		};

		/**

dp/wifi3.0/dp_ipa.c

+38 −0

Original line number	Diff line number	Diff line
		@@ -1677,11 +1677,40 @@ QDF_STATUS dp_ipa_enable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
		return QDF_STATUS_SUCCESS;
		}

		/*
		* dp_ipa_get_tx_comp_pending_check() - Check if tx completions are pending.
		* @soc: DP pdev Context
		*
		* Ring full condition is checked to find if buffers are left for
		* processing as host only allocates buffers in this ring and IPA HW processes
		* the buffer.
		*
		* Return: True if tx completions are pending
		*/
		static bool dp_ipa_get_tx_comp_pending_check(struct dp_soc *soc)
		{
		struct dp_srng *tx_comp_ring =
		&soc->tx_comp_ring[IPA_TX_COMP_RING_IDX];
		uint32_t hp, tp, entry_size, buf_cnt;

		hal_get_hw_hptp(soc->hal_soc, tx_comp_ring->hal_srng, &hp, &tp,
		WBM2SW_RELEASE);
		entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM2SW_RELEASE) >> 2;

		if (hp > tp)
		buf_cnt = (hp - tp) / entry_size;
		else
		buf_cnt = (tx_comp_ring->num_entries - tp + hp) / entry_size;

		return (soc->ipa_uc_tx_rsc.alloc_tx_buf_cnt != buf_cnt);
		}

		QDF_STATUS dp_ipa_disable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
		{
		struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
		struct dp_pdev *pdev =
		dp_get_pdev_from_soc_pdev_id_wifi3(soc, pdev_id);
		int timeout = TX_COMP_DRAIN_WAIT_TIMEOUT_MS;
		QDF_STATUS result;

		if (!pdev) {
		@@ -1689,6 +1718,15 @@ QDF_STATUS dp_ipa_disable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
		return QDF_STATUS_E_FAILURE;
		}

		while (dp_ipa_get_tx_comp_pending_check(soc)) {
		qdf_sleep(TX_COMP_DRAIN_WAIT_MS);
		timeout -= TX_COMP_DRAIN_WAIT_MS;
		if (timeout <= 0) {
		dp_err("Tx completions pending. Force Disabling pipes");
		break;
		}
		}

		result = qdf_ipa_wdi_disable_pipes();
		if (result) {
		QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,

dp/wifi3.0/dp_ipa.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -24,6 +24,10 @@
		#define IPA_REO_DEST_RING_IDX 3
		#define IPA_RX_REFILL_BUF_RING_IDX 2

		/* Adding delay before disabling ipa pipes if any Tx Completions are pending */
		#define TX_COMP_DRAIN_WAIT_MS 50
		#define TX_COMP_DRAIN_WAIT_TIMEOUT_MS 200

		/**
		* struct dp_ipa_uc_tx_hdr - full tx header registered to IPA hardware
		* @eth: ether II header

dp/wifi3.0/dp_main.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -10104,6 +10104,9 @@ static uint32_t dp_get_cfg(struct cdp_soc_t *soc, enum cdp_dp_cfg cfg)
		case cfg_dp_pktlog_buffer_size:
		value = dpsoc->wlan_cfg_ctx->pktlog_buffer_size;
		break;
		case cfg_dp_wow_check_rx_pending:
		value = dpsoc->wlan_cfg_ctx->wow_check_rx_pending_enable;
		break;
		default:
		value = 0;
		}