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Commit 7f2cf220 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Improve FBC plane defines a bit 



Make the FBC plane macros take the plane as a parameter.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 4e41f3ac

drivers/gpu/drm/i915/i915_reg.h

+3 −5
Original line number Diff line number Diff line
@@ -1047,8 +1047,7 @@ 
#define   FBC_CTL_IDLE_LINE	(2<<2)

#define   FBC_CTL_IDLE_DEBUG	(3<<2)

#define   FBC_CTL_CPU_FENCE	(1<<1)

#define   FBC_CTL_PLANEA	(0<<0)

#define   FBC_CTL_PLANEB	(1<<0)

#define   FBC_CTL_PLANE(plane)	((plane)<<0)

#define FBC_FENCE_OFF		0x0321b

#define FBC_TAG			0x03300
@@ -1058,9 +1057,8 @@ 
#define DPFC_CB_BASE		0x3200

#define DPFC_CONTROL		0x3208

#define   DPFC_CTL_EN		(1<<31)

#define   DPFC_CTL_PLANEA	(0<<30)

#define   DPFC_CTL_PLANEB	(1<<30)

#define   IVB_DPFC_CTL_PLANE_SHIFT	(29)

#define   DPFC_CTL_PLANE(plane)	((plane)<<30)

#define   IVB_DPFC_CTL_PLANE(plane)	((plane)<<29)

#define   DPFC_CTL_FENCE_EN	(1<<29)

#define   IVB_DPFC_CTL_FENCE_EN	(1<<28)

#define   DPFC_CTL_PERSISTENT_MODE	(1<<25)

drivers/gpu/drm/i915/intel_pm.c

+5 −8
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc) 
	struct drm_i915_gem_object *obj = intel_fb->obj;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int cfb_pitch;

	int plane, i;

	int i;

	u32 fbc_ctl;



	cfb_pitch = dev_priv->fbc.size / FBC_LL_SIZE;
@@ -109,7 +109,6 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc) 
		cfb_pitch = (cfb_pitch / 32) - 1;

	else

		cfb_pitch = (cfb_pitch / 64) - 1;

	plane = intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB;



	/* Clear old tags */

	for (i = 0; i < (FBC_LL_SIZE / 32) + 1; i++)
@@ -120,7 +119,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc) 


		/* Set it up... */

		fbc_ctl2 = FBC_CTL_FENCE_DBL | FBC_CTL_IDLE_IMM | FBC_CTL_CPU_FENCE;

		fbc_ctl2 |= plane;

		fbc_ctl2 |= FBC_CTL_PLANE(intel_crtc->plane);

		I915_WRITE(FBC_CONTROL2, fbc_ctl2);

		I915_WRITE(FBC_FENCE_OFF, crtc->y);

	}
@@ -154,10 +153,9 @@ static void g4x_enable_fbc(struct drm_crtc *crtc) 
	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);

	struct drm_i915_gem_object *obj = intel_fb->obj;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int plane = intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB;

	u32 dpfc_ctl;



	dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;

	dpfc_ctl = DPFC_CTL_PLANE(intel_crtc->plane) | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;

	dpfc_ctl |= DPFC_CTL_FENCE_EN | obj->fence_reg;



	I915_WRITE(DPFC_FENCE_YOFF, crtc->y);
@@ -223,12 +221,11 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc) 
	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);

	struct drm_i915_gem_object *obj = intel_fb->obj;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	int plane = intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB;

	u32 dpfc_ctl;



	dpfc_ctl = I915_READ(ILK_DPFC_CONTROL);

	dpfc_ctl &= DPFC_RESERVED;

	dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X);

	dpfc_ctl |= DPFC_CTL_PLANE(intel_crtc->plane) | DPFC_CTL_LIMIT_1X;

	dpfc_ctl |= DPFC_CTL_FENCE_EN;

	if (IS_GEN5(dev))

		dpfc_ctl |= obj->fence_reg;
@@ -281,7 +278,7 @@ static void gen7_enable_fbc(struct drm_crtc *crtc) 


	I915_WRITE(ILK_DPFC_CONTROL, DPFC_CTL_EN | DPFC_CTL_LIMIT_1X |

		   IVB_DPFC_CTL_FENCE_EN |

		   intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);

		   IVB_DPFC_CTL_PLANE(intel_crtc->plane));



	if (IS_IVYBRIDGE(dev)) {

		/* WaFbcAsynchFlipDisableFbcQueue:ivb */