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Commit 7e913664 authored by Andrew F. Davis's avatar Andrew F. Davis Committed by Alex Deucher
Browse files

drm/amdgpu: remove unneeded conversions to bool 



Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c98b5c97

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+2 −2
Original line number Diff line number Diff line
@@ -5859,7 +5859,7 @@ static int gfx_v8_0_set_powergating_state(void *handle, 
					  enum amd_powergating_state state)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	bool enable = (state == AMD_PG_STATE_GATE) ? true : false;

	bool enable = (state == AMD_PG_STATE_GATE);



	if (amdgpu_sriov_vf(adev))

		return 0;
@@ -6445,7 +6445,7 @@ static int gfx_v8_0_set_clockgating_state(void *handle, 
	case CHIP_CARRIZO:

	case CHIP_STONEY:

		gfx_v8_0_update_gfx_clock_gating(adev,

						 state == AMD_CG_STATE_GATE ? true : false);

						 state == AMD_CG_STATE_GATE);

		break;

	case CHIP_TONGA:

		gfx_v8_0_tonga_update_gfx_clock_gating(adev, state);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

+2 −2
Original line number Diff line number Diff line
@@ -1520,9 +1520,9 @@ static int gmc_v8_0_set_clockgating_state(void *handle, 
	switch (adev->asic_type) {

	case CHIP_FIJI:

		fiji_update_mc_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		fiji_update_mc_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		break;

	default:

		break;

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

+2 −2
Original line number Diff line number Diff line
@@ -1522,9 +1522,9 @@ static int sdma_v3_0_set_clockgating_state(void *handle, 
	case CHIP_CARRIZO:

	case CHIP_STONEY:

		sdma_v3_0_update_sdma_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		sdma_v3_0_update_sdma_medium_grain_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		break;

	default:

		break;

drivers/gpu/drm/amd/amdgpu/vi.c

+8 −8
Original line number Diff line number Diff line
@@ -1403,24 +1403,24 @@ static int vi_common_set_clockgating_state(void *handle, 
	switch (adev->asic_type) {

	case CHIP_FIJI:

		vi_update_bif_medium_grain_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		vi_update_hdp_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		vi_update_hdp_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		vi_update_rom_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		break;

	case CHIP_CARRIZO:

	case CHIP_STONEY:

		vi_update_bif_medium_grain_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		vi_update_hdp_medium_grain_clock_gating(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		vi_update_hdp_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		vi_update_drm_light_sleep(adev,

				state == AMD_CG_STATE_GATE ? true : false);

				state == AMD_CG_STATE_GATE);

		break;

	case CHIP_TONGA:

	case CHIP_POLARIS10: