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Commit 7e7e76bd authored by Jack Yu's avatar Jack Yu Committed by Mark Brown
Browse files

ASoC: Add jd function for rt5663. 



Add initial setting for rt5663 jd to irq.

Signed-off-by: default avatarJack Yu <jack.yu@realtek.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 1001354c

sound/soc/codecs/rt5663.c

+10 −1
Original line number Diff line number Diff line
@@ -3140,12 +3140,21 @@ static int rt5663_i2c_probe(struct i2c_client *i2c, 
			RT5668_LDO1_DVO_0_9V | RT5668_AMP_HP_3X);

			break;

	case CODEC_TYPE_RT5663:

		regmap_update_bits(rt5663->regmap, RT5663_DIG_MISC,

			RT5668_DIG_GATE_CTRL_MASK, RT5668_DIG_GATE_CTRL_EN);

		regmap_update_bits(rt5663->regmap, RT5663_AUTO_1MRC_CLK,

			RT5668_IRQ_POW_SAV_MASK, RT5668_IRQ_POW_SAV_EN);

		regmap_update_bits(rt5663->regmap, RT5663_IRQ_1,

			RT5663_EN_IRQ_JD1_MASK, RT5663_EN_IRQ_JD1_EN);

		regmap_update_bits(rt5663->regmap, RT5663_GPIO_1,

			RT5663_GPIO1_TYPE_MASK, RT5663_GPIO1_TYPE_EN);

		regmap_write(rt5663->regmap, RT5663_VREF_RECMIX, 0x0032);

		regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xa2be);

		msleep(20);

		regmap_write(rt5663->regmap, RT5663_PWR_ANLG_1, 0xf2be);

		regmap_update_bits(rt5663->regmap, RT5663_GPIO_2,

			RT5663_GP1_PIN_CONF_MASK, RT5663_GP1_PIN_CONF_OUTPUT);

			RT5663_GP1_PIN_CONF_MASK | RT5663_SEL_GPIO1_MASK,

			RT5663_GP1_PIN_CONF_OUTPUT | RT5663_SEL_GPIO1_EN);

		/* DACREF LDO control */

		regmap_update_bits(rt5663->regmap, RT5663_DACREF_LDO, 0x3e0e,

			0x3a0a);

sound/soc/codecs/rt5663.h

+10 −0
Original line number Diff line number Diff line
@@ -996,11 +996,21 @@ 
#define RT5663_EN_IRQ_INLINE_NOR		(0x1 << 3)

#define RT5663_EN_IRQ_INLINE_BYP		(0x0 << 3)



/*  RT5663: GPIO Control 1 (0x00c0) */

#define RT5663_GPIO1_TYPE_MASK			(0x1 << 15)

#define RT5663_GPIO1_TYPE_SHIFT			15

#define RT5663_GPIO1_TYPE_EN			(0x1 << 15)

#define RT5663_GPIO1_TYPE_DIS			(0x0 << 15)



/* RT5663: IRQ Control 1 (0x00c1) */

#define RT5663_EN_IRQ_JD1_MASK			(0x1 << 6)

#define RT5663_EN_IRQ_JD1_SHIFT			6

#define RT5663_EN_IRQ_JD1_EN			(0x1 << 6)

#define RT5663_EN_IRQ_JD1_DIS			(0x0 << 6)

#define RT5663_SEL_GPIO1_MASK			(0x1 << 2)

#define RT5663_SEL_GPIO1_SHIFT			6

#define RT5663_SEL_GPIO1_EN			(0x1 << 2)

#define RT5663_SEL_GPIO1_DIS			(0x0 << 2)



/* RT5663: Inline Command Function 2 (0x00dc) */

#define RT5663_PWR_MIC_DET_MASK			(0x1)