Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7e065fb9 authored by Niklas Cassel's avatar Niklas Cassel Committed by Linus Walleij
Browse files

pinctrl: artpec6: dt: add missing pin group uart5nocts



Add missing pin group uart5nocts (all pins except cts), which has been
supported by the artpec6 pinctrl driver since its initial submission.

Fixes: 00df0582 ("pinctrl: Add pincontrol driver for ARTPEC-6 SoC")
Signed-off-by: default avatarNiklas Cassel <niklas.cassel@axis.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 41e009b2
Loading
Loading
Loading
Loading
+3 −2
Original line number Diff line number Diff line
@@ -20,7 +20,8 @@ Required subnode-properties:
		gpio: cpuclkoutgrp0, udlclkoutgrp0, i2c1grp0, i2c2grp0,
		      i2c3grp0, i2s0grp0, i2s1grp0, i2srefclkgrp0, spi0grp0,
		      spi1grp0, pciedebuggrp0, uart0grp0, uart0grp1, uart1grp0,
		      uart2grp0, uart2grp1, uart3grp0, uart4grp0, uart5grp0
		      uart2grp0, uart2grp1, uart3grp0, uart4grp0, uart5grp0,
		      uart5nocts
		cpuclkout: cpuclkoutgrp0
		udlclkout: udlclkoutgrp0
		i2c1: i2c1grp0
@@ -37,7 +38,7 @@ Required subnode-properties:
		uart2: uart2grp0, uart2grp1
		uart3: uart3grp0
		uart4: uart4grp0
		uart5: uart5grp0
		uart5: uart5grp0, uart5nocts
		nand: nandgrp0
		sdio0: sdio0grp0
		sdio1: sdio1grp0