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Commit 7da4b29d authored by Mathias Krause's avatar Mathias Krause Committed by Herbert Xu
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crypto: aesni - disable "by8" AVX CTR optimization 



The "by8" implementation introduced in commit 22cddcc7 ("crypto: aes
- AES CTR x86_64 "by8" AVX optimization") is failing crypto tests as it
handles counter block overflows differently. It only accounts the right
most 32 bit as a counter -- not the whole block as all other
implementations do. This makes it fail the cryptomgr test #4 that
specifically tests this corner case.

As we're quite late in the release cycle, just disable the "by8" variant
for now.

Reported-by: default avatarRomain Francoise <romain@orebokech.com>
Signed-off-by: default avatarMathias Krause <minipli@googlemail.com>
Cc: Chandramouli Narayanan <mouli@linux.intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent c9f21cb6

arch/x86/crypto/aesni-intel_glue.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -481,7 +481,7 @@ static void ctr_crypt_final(struct crypto_aes_ctx *ctx, 
	crypto_inc(ctrblk, AES_BLOCK_SIZE);

	crypto_inc(ctrblk, AES_BLOCK_SIZE);

}

}





#ifdef CONFIG_AS_AVX

#if 0	/* temporary disabled due to failing crypto tests */

static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,

static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,

			      const u8 *in, unsigned int len, u8 *iv)

			      const u8 *in, unsigned int len, u8 *iv)

{

{
@@ -1522,7 +1522,7 @@ static int __init aesni_init(void) 
		aesni_gcm_dec_tfm = aesni_gcm_dec;

		aesni_gcm_dec_tfm = aesni_gcm_dec;

	}

	}

	aesni_ctr_enc_tfm = aesni_ctr_enc;

	aesni_ctr_enc_tfm = aesni_ctr_enc;

#ifdef CONFIG_AS_AVX

#if 0	/* temporary disabled due to failing crypto tests */

	if (cpu_has_avx) {

	if (cpu_has_avx) {

		/* optimize performance of ctr mode encryption transform */

		/* optimize performance of ctr mode encryption transform */

		aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;

		aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;