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Commit 7d9e89c7 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-dt-3.19' of git://git.infradead.org/linux-mvebu into next/dt

Pull "mvebu DT changes for v3.19" from Jason Cooper:

 - mvebu
    - ReadyNAS 102 leds, esata
    - ReadyNAS 2120 esata
    - Add cache-unified for Aurora L2 node
    - Add ref clk for timer and watchdog on Armada 375
    - Cleanup Armada XP pinctrl for GigE
    - Add RGMII pinctrl, i2c eeprom, and fix 74hc595 counter on Lenovo ix4-300d

 - kirkwood
    - Add DLink DIR665 and it's DSA configuration

* tag 'mvebu-dt-3.19' of git://git.infradead.org/linux-mvebu

:
  ARM: mvebu: armada-xp: Fix 74hc595 count for Lenovo ix4-300d
  ARM: mvebu: armada-xp: Add I2C eeprom on Lenovo ix4-300d
  ARM: mvebu: armada-xp: Add RGMII pinctrl to Lenovo ix4-300d
  ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMII
  ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMII
  ARM: mvebu: armada-xp: Use pinctrl node alias
  ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address
  ARM: mvebu: armada-xp: Consolidate pinctrl node
  ARM: Kirkwood: DIR665: Instantiate Distributed Switch Architecture
  ARM: Kirkwood: Add support for DLink DIR665
  ARM: mvebu: Enable rear eSATA ports of NETGEAR ReadyNAS 2120
  ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC
  arm: mvebu: Clarify (e)SATA ports info in NETGEAR ReadyNAS 102 .dts file
  arm: mvebu: Fix LED color in NETGEAR ReadyNAS 102 .dts file
  ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2184d566 f5ed9ccc
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+1 −0
Original line number Diff line number Diff line
@@ -109,6 +109,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
	kirkwood-d2net.dtb \
	kirkwood-db-88f6281.dtb \
	kirkwood-db-88f6282.dtb \
	kirkwood-dir665.dtb \
	kirkwood-dns320.dtb \
	kirkwood-dns325.dtb \
	kirkwood-dockstar.dtb \
+9 −8
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@
		pcie-controller {
			status = "okay";

			/* Connected to Marvell SATA controller */
			/* Connected to Marvell 88SE9170 SATA controller */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
@@ -53,8 +53,9 @@
				status = "okay";
			};

			/* eSATA interface */
			sata@a0000 {
				nr-ports = <2>;
				nr-ports = <1>;
				status = "okay";
			};

@@ -204,20 +205,20 @@
			default-state = "keep";
		};

		green-sata1-led {
			label = "rn102:green:sata1";
		blue-sata1-led {
			label = "rn102:blue:sata1";
			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		green-sata2-led {
			label = "rn102:green:sata2";
		blue-sata2-led {
			label = "rn102:blue:sata2";
			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		green-backup-led {
			label = "rn102:green:backup";
		blue-backup-led {
			label = "rn102:blue:backup";
			gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};
+1 −0
Original line number Diff line number Diff line
@@ -95,6 +95,7 @@
				compatible = "marvell,aurora-outer-cache";
				reg = <0x08000 0x1000>;
				cache-id-part = <0x100>;
				cache-unified;
				wt-override;
			};

+10 −2
Original line number Diff line number Diff line
@@ -36,6 +36,12 @@
			#clock-cells = <0>;
			clock-frequency = <2000000000>;
		};
		/* 25 MHz reference crystal */
		refclk: oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <25000000>;
		};
	};

	cpus {
@@ -366,13 +372,15 @@
						      <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
						      <&mpic 5>,
						      <&mpic 6>;
				clocks = <&coreclk 0>;
				clocks = <&coreclk 0>, <&refclk>;
				clock-names = "nbclk", "fixed";
			};

			watchdog@20300 {
				compatible = "marvell,armada-375-wdt";
				reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>;
				clocks = <&coreclk 0>;
				clocks = <&coreclk 0>, <&refclk>;
				clock-names = "nbclk", "fixed";
			};

			cpurst@20800 {
+22 −36
Original line number Diff line number Diff line
@@ -60,40 +60,6 @@
		};

		internal-regs {
			pinctrl {
				pinctrl-0 = <&pmx_phy_int>;
				pinctrl-names = "default";

				pmx_ge0: pmx-ge0 {
					marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
						       "mpp4", "mpp5", "mpp6", "mpp7",
						       "mpp8", "mpp9", "mpp10", "mpp11";
					marvell,function = "ge0";
				};

				pmx_ge1: pmx-ge1 {
					marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
						       "mpp16", "mpp17", "mpp18", "mpp19",
						       "mpp20", "mpp21", "mpp22", "mpp23";
					marvell,function = "ge1";
				};

				pmx_keys: pmx-keys {
					marvell,pins = "mpp33";
					marvell,function = "gpio";
				};

				pmx_spi: pmx-spi {
					marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
					marvell,function = "spi";
				};

				pmx_phy_int: pmx-phy-int {
					marvell,pins = "mpp32";
					marvell,function = "gpio";
				};
			};

			serial@12000 {
				status = "okay";
			};
@@ -118,14 +84,14 @@
			};

			ethernet@70000 {
				pinctrl-0 = <&pmx_ge0>;
				pinctrl-0 = <&pmx_ge0_rgmii>;
				pinctrl-names = "default";
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};
			ethernet@74000 {
				pinctrl-0 = <&pmx_ge1>;
				pinctrl-0 = <&pmx_ge1_rgmii>;
				pinctrl-names = "default";
				status = "okay";
				phy = <&phy1>;
@@ -162,3 +128,23 @@
		};
	};
};

&pinctrl {
	pinctrl-0 = <&pmx_phy_int>;
	pinctrl-names = "default";

	pmx_keys: pmx-keys {
		marvell,pins = "mpp33";
		marvell,function = "gpio";
	};

	pmx_spi: pmx-spi {
		marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
		marvell,function = "spi";
	};

	pmx_phy_int: pmx-phy-int {
		marvell,pins = "mpp32";
		marvell,function = "gpio";
	};
};
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