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Commit 7d99331e authored by Will Deacon's avatar Will Deacon
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ARM: hw_breakpoint: reset control registers in hotplug path 



The ARMv7 debug architecture doesn't make any guarantees about the
contents of debug control registers following a debug logic reset.

This patch ensures that we reset the control registers when a cpu
comes ONLINE (for example, with hotplug) so that when we enable
monitor mode while inserting a breakpoint we won't exhibit random
behaviour.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent ac88e071

arch/arm/kernel/hw_breakpoint.c

+15 −1
Original line number Diff line number Diff line
@@ -764,7 +764,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, 
/*

 * One-time initialisation.

 */

static void __init reset_ctrl_regs(void *unused)

static void reset_ctrl_regs(void *unused)

{

	int i;
@@ -799,6 +799,18 @@ static void __init reset_ctrl_regs(void *unused) 
	}

}



static int __cpuinit dbg_reset_notify(struct notifier_block *self,

				      unsigned long action, void *cpu)

{

	if (action == CPU_ONLINE)

		smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1);

	return NOTIFY_OK;

}



static struct notifier_block __cpuinitdata dbg_reset_nb = {

	.notifier_call = dbg_reset_notify,

};



static int __init arch_hw_breakpoint_init(void)

{

	int ret = 0;
@@ -846,6 +858,8 @@ static int __init arch_hw_breakpoint_init(void) 
	hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,

			"breakpoint debug exception");



	/* Register hotplug notifier. */

	register_cpu_notifier(&dbg_reset_nb);

out:

	return ret;

}