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Commit 7d8d0639 authored by Felipe Balbi's avatar Felipe Balbi
Browse files

usb: dwc3: gadget: implement ->udc_set_speed() 



Use this method to make sure we don't try to connect on speeds not
supported by the gadget driver.

Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 67fdfda4

drivers/usb/dwc3/gadget.c

+58 −43
Original line number Diff line number Diff line
@@ -1827,49 +1827,6 @@ static int __dwc3_gadget_start(struct dwc3 *dwc) 
		dwc3_writel(dwc->regs, DWC3_DEV_IMOD(0), 0);

	}



	reg = dwc3_readl(dwc->regs, DWC3_DCFG);

	reg &= ~(DWC3_DCFG_SPEED_MASK);



	/*

	 * WORKAROUND: DWC3 revision < 2.20a have an issue

	 * which would cause metastability state on Run/Stop

	 * bit if we try to force the IP to USB2-only mode.

	 *

	 * Because of that, we cannot configure the IP to any

	 * speed other than the SuperSpeed

	 *

	 * Refers to:

	 *

	 * STAR#9000525659: Clock Domain Crossing on DCTL in

	 * USB 2.0 Mode

	 */

	if (dwc->revision < DWC3_REVISION_220A) {

		reg |= DWC3_DCFG_SUPERSPEED;

	} else {

		switch (dwc->maximum_speed) {

		case USB_SPEED_LOW:

			reg |= DWC3_DCFG_LOWSPEED;

			break;

		case USB_SPEED_FULL:

			reg |= DWC3_DCFG_FULLSPEED;

			break;

		case USB_SPEED_HIGH:

			reg |= DWC3_DCFG_HIGHSPEED;

			break;

		case USB_SPEED_SUPER_PLUS:

			reg |= DWC3_DCFG_SUPERSPEED_PLUS;

			break;

		default:

			dev_err(dwc->dev, "invalid dwc->maximum_speed (%d)\n",

				dwc->maximum_speed);

			/* fall through */

		case USB_SPEED_SUPER:

			reg |= DWC3_DCFG_SUPERSPEED;

			break;

		}

	}

	dwc3_writel(dwc->regs, DWC3_DCFG, reg);



	/*

	 * We are telling dwc3 that we want to use DCFG.NUMP as ACK TP's NUMP

	 * field instead of letting dwc3 itself calculate that automatically.
@@ -2001,6 +1958,63 @@ static int dwc3_gadget_stop(struct usb_gadget *g) 
	return 0;

}



static void dwc3_gadget_set_speed(struct usb_gadget *g,

				  enum usb_device_speed speed)

{

	struct dwc3		*dwc = gadget_to_dwc(g);

	unsigned long		flags;

	u32			reg;



	spin_lock_irqsave(&dwc->lock, flags);

	reg = dwc3_readl(dwc->regs, DWC3_DCFG);

	reg &= ~(DWC3_DCFG_SPEED_MASK);



	/*

	 * WORKAROUND: DWC3 revision < 2.20a have an issue

	 * which would cause metastability state on Run/Stop

	 * bit if we try to force the IP to USB2-only mode.

	 *

	 * Because of that, we cannot configure the IP to any

	 * speed other than the SuperSpeed

	 *

	 * Refers to:

	 *

	 * STAR#9000525659: Clock Domain Crossing on DCTL in

	 * USB 2.0 Mode

	 */

	if (dwc->revision < DWC3_REVISION_220A) {

		reg |= DWC3_DCFG_SUPERSPEED;

	} else {

		switch (speed) {

		case USB_SPEED_LOW:

			reg |= DWC3_DCFG_LOWSPEED;

			break;

		case USB_SPEED_FULL:

			reg |= DWC3_DCFG_FULLSPEED;

			break;

		case USB_SPEED_HIGH:

			reg |= DWC3_DCFG_HIGHSPEED;

			break;

		case USB_SPEED_SUPER:

			reg |= DWC3_DCFG_SUPERSPEED;

			break;

		case USB_SPEED_SUPER_PLUS:

			reg |= DWC3_DCFG_SUPERSPEED_PLUS;

			break;

		default:

			dev_err(dwc->dev, "invalid speed (%d)\n", speed);



			if (dwc->revision & DWC3_REVISION_IS_DWC31)

				reg |= DWC3_DCFG_SUPERSPEED_PLUS;

			else

				reg |= DWC3_DCFG_SUPERSPEED;

		}

	}

	dwc3_writel(dwc->regs, DWC3_DCFG, reg);



	spin_unlock_irqrestore(&dwc->lock, flags);

}



static const struct usb_gadget_ops dwc3_gadget_ops = {

	.get_frame		= dwc3_gadget_get_frame,

	.wakeup			= dwc3_gadget_wakeup,
@@ -2008,6 +2022,7 @@ static const struct usb_gadget_ops dwc3_gadget_ops = { 
	.pullup			= dwc3_gadget_pullup,

	.udc_start		= dwc3_gadget_start,

	.udc_stop		= dwc3_gadget_stop,

	.udc_set_speed		= dwc3_gadget_set_speed,

};



/* -------------------------------------------------------------------------- */