Loading drivers/platform/msm/ipa/ipa_v3/dump/ipa4.5/ipa_hw_common_ex.h +24 −0 Original line number Diff line number Diff line Loading @@ -481,6 +481,30 @@ enum ipa_hw_irq_srcs_e { */ #define IPA_RX_SPLT_CMDQ_MAX 4 /* * Although not necessary for the numbers below, the use of round_up * is so that future developers know that these particular constants * have to be a multiple of four bytes, because the IPA memory reads * that they drive are always 32 bits... */ #define IPA_IU_ADDR 0x000A0000 #define IPA_IU_SIZE round_up(40704, sizeof(u32)) #define IPA_SRAM_ADDR 0x00050000 #define IPA_SRAM_SIZE round_up(19232, sizeof(u32)) #define IPA_MBOX_ADDR 0x000C2000 #define IPA_MBOX_SIZE round_up(256, sizeof(u32)) #define IPA_HRAM_ADDR 0x00060000 #define IPA_HRAM_SIZE round_up(47536, sizeof(u32)) #define IPA_SEQ_ADDR 0x00081000 #define IPA_SEQ_SIZE round_up(768, sizeof(u32)) #define IPA_GSI_ADDR 0x00006000 #define IPA_GSI_SIZE round_up(5376, sizeof(u32)) /* * Macro to define a particular register cfg entry for all pipe * indexed register Loading drivers/platform/msm/ipa/ipa_v3/dump/ipa_reg_dump.c +96 −5 Original line number Diff line number Diff line Loading @@ -948,6 +948,33 @@ void ipa_save_registers(void) } } if (ipa3_ctx->do_ram_collection_on_crash) { for (i = 0; i < IPA_IU_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_iu_ptr[i] = in_dword(IPA_IU_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_SRAM_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_sram_ptr[i] = in_dword(IPA_SRAM_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_MBOX_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_mbox_ptr[i] = in_dword(IPA_MBOX_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_HRAM_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_hram_ptr[i] = in_dword(IPA_HRAM_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_SEQ_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_seq_ptr[i] = in_dword(IPA_SEQ_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_GSI_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_gsi_ptr[i] = in_dword(IPA_GSI_ADDR + (i * sizeof(u32))); } } ipa_reg_save_anomaly_check(); IPAERR("Completed\n"); Loading Loading @@ -1407,6 +1434,7 @@ int ipa_reg_save_init(u32 value) ipa_reg_save.ipa.testbus = NULL; if (ipa3_ctx->do_testbus_collection_on_crash) { memset(ipa_testbus_mem, value, sizeof(ipa_testbus_mem)); ipa_reg_save.ipa.testbus = (struct ipa_reg_save_ipa_testbus_s *) ipa_testbus_mem; } Loading @@ -1422,17 +1450,80 @@ int ipa_reg_save_init(u32 value) if (!ipa3_ctx->reg_collection_base) { IPAERR(":register collection ioremap err\n"); return -EFAULT; goto alloc_fail1; } num_regs -= (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * num_regs -= (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * IPA_REG_SAVE_NUM_EXTRA_ENDP_REGS); for (i = 0; i < (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * IPA_REG_SAVE_NUM_EXTRA_ENDP_REGS); i++) for (i = 0; i < (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * IPA_REG_SAVE_NUM_EXTRA_ENDP_REGS); i++) *(ipa_regs_to_save_array[num_regs + i].dst_addr) = 0x0; ipa_reg_save.ipa.ipa_seq_ptr = NULL; ipa_reg_save.ipa.ipa_hram_ptr = NULL; ipa_reg_save.ipa.ipa_mbox_ptr = NULL; ipa_reg_save.ipa.ipa_sram_ptr = NULL; ipa_reg_save.ipa.ipa_iu_ptr = NULL; if (ipa3_ctx->do_ram_collection_on_crash) { ipa_reg_save.ipa.ipa_iu_ptr = alloc_and_init(IPA_IU_SIZE, value); if (!ipa_reg_save.ipa.ipa_iu_ptr) { IPAERR("ipa_iu_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_sram_ptr = alloc_and_init(IPA_SRAM_SIZE, value); if (!ipa_reg_save.ipa.ipa_sram_ptr) { IPAERR("ipa_sram_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_mbox_ptr = alloc_and_init(IPA_MBOX_SIZE, value); if (!ipa_reg_save.ipa.ipa_mbox_ptr) { IPAERR("ipa_mbox_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_hram_ptr = alloc_and_init(IPA_HRAM_SIZE, value); if (!ipa_reg_save.ipa.ipa_hram_ptr) { IPAERR("ipa_hram_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_seq_ptr = alloc_and_init(IPA_SEQ_SIZE, value); if (!ipa_reg_save.ipa.ipa_seq_ptr) { IPAERR("ipa_seq_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_gsi_ptr = alloc_and_init(IPA_GSI_SIZE, value); if (!ipa_reg_save.ipa.ipa_gsi_ptr) { IPAERR("ipa_gsi_ptr memory alloc failed\n"); goto alloc_fail2; } } return 0; alloc_fail2: kfree(ipa_reg_save.ipa.ipa_seq_ptr); kfree(ipa_reg_save.ipa.ipa_hram_ptr); kfree(ipa_reg_save.ipa.ipa_mbox_ptr); kfree(ipa_reg_save.ipa.ipa_sram_ptr); kfree(ipa_reg_save.ipa.ipa_iu_ptr); iounmap(ipa3_ctx->reg_collection_base); alloc_fail1: return -ENOMEM; } /* Loading drivers/platform/msm/ipa/ipa_v3/dump/ipa_reg_dump.h +6 −0 Original line number Diff line number Diff line Loading @@ -1200,6 +1200,12 @@ struct ipa_regs_save_hierarchy_s { src_rsrc_cnt[IPA_HW_SRC_RSRP_TYPE_MAX]; struct ipa_reg_save_dst_rsrc_cnt_s dst_rsrc_cnt[IPA_HW_DST_RSRP_TYPE_MAX]; u32 *ipa_iu_ptr; u32 *ipa_sram_ptr; u32 *ipa_mbox_ptr; u32 *ipa_hram_ptr; u32 *ipa_seq_ptr; u32 *ipa_gsi_ptr; }; /* Top level GSI register save data struct */ Loading drivers/platform/msm/ipa/ipa_v3/ipa.c +14 −1 Original line number Diff line number Diff line Loading @@ -5333,6 +5333,8 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, resource_p->do_non_tn_collection_on_crash; ipa3_ctx->secure_debug_check_action = resource_p->secure_debug_check_action; ipa3_ctx->do_ram_collection_on_crash = resource_p->do_ram_collection_on_crash; if (ipa3_ctx->secure_debug_check_action == USE_SCM) { if (ipa_is_mem_dump_allowed()) Loading Loading @@ -6309,8 +6311,19 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, IPADBG(": doing non-tn collection on crash = %u\n", ipa_drv_res->do_non_tn_collection_on_crash); /* * We'll read ram-collection-on-crash here... */ ipa_drv_res->do_ram_collection_on_crash = of_property_read_bool( pdev->dev.of_node, "qcom,ram-collection-on-crash"); IPADBG(": doing ram collection on crash = %u\n", ipa_drv_res->do_ram_collection_on_crash); if (ipa_drv_res->do_testbus_collection_on_crash || ipa_drv_res->do_non_tn_collection_on_crash) ipa_drv_res->do_non_tn_collection_on_crash || ipa_drv_res->do_ram_collection_on_crash) ipa_drv_res->do_register_collection_on_crash = true; IPADBG(": doing register collection on crash = %u\n", Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +12 −0 Original line number Diff line number Diff line Loading @@ -1699,6 +1699,7 @@ struct ipa3_context { bool do_register_collection_on_crash; bool do_testbus_collection_on_crash; bool do_non_tn_collection_on_crash; bool do_ram_collection_on_crash; u32 secure_debug_check_action; u32 sd_state; void __iomem *reg_collection_base; Loading Loading @@ -1751,6 +1752,7 @@ struct ipa3_plat_drv_res { bool do_register_collection_on_crash; bool do_testbus_collection_on_crash; bool do_non_tn_collection_on_crash; bool do_ram_collection_on_crash; u32 secure_debug_check_action; bool ipa_endp_delay_wa; }; Loading Loading @@ -2813,4 +2815,14 @@ static inline int ipa_mpm_reset_dma_mode(enum ipa_client_type src_pipe, #endif /* CONFIG_IPA3_MHI_PRIME_MANAGER */ static inline void *alloc_and_init(u32 size, u32 init_val) { void *ptr = kmalloc(size, GFP_KERNEL); if (ptr) memset(ptr, init_val, size); return ptr; } #endif /* _IPA3_I_H_ */ Loading
drivers/platform/msm/ipa/ipa_v3/dump/ipa4.5/ipa_hw_common_ex.h +24 −0 Original line number Diff line number Diff line Loading @@ -481,6 +481,30 @@ enum ipa_hw_irq_srcs_e { */ #define IPA_RX_SPLT_CMDQ_MAX 4 /* * Although not necessary for the numbers below, the use of round_up * is so that future developers know that these particular constants * have to be a multiple of four bytes, because the IPA memory reads * that they drive are always 32 bits... */ #define IPA_IU_ADDR 0x000A0000 #define IPA_IU_SIZE round_up(40704, sizeof(u32)) #define IPA_SRAM_ADDR 0x00050000 #define IPA_SRAM_SIZE round_up(19232, sizeof(u32)) #define IPA_MBOX_ADDR 0x000C2000 #define IPA_MBOX_SIZE round_up(256, sizeof(u32)) #define IPA_HRAM_ADDR 0x00060000 #define IPA_HRAM_SIZE round_up(47536, sizeof(u32)) #define IPA_SEQ_ADDR 0x00081000 #define IPA_SEQ_SIZE round_up(768, sizeof(u32)) #define IPA_GSI_ADDR 0x00006000 #define IPA_GSI_SIZE round_up(5376, sizeof(u32)) /* * Macro to define a particular register cfg entry for all pipe * indexed register Loading
drivers/platform/msm/ipa/ipa_v3/dump/ipa_reg_dump.c +96 −5 Original line number Diff line number Diff line Loading @@ -948,6 +948,33 @@ void ipa_save_registers(void) } } if (ipa3_ctx->do_ram_collection_on_crash) { for (i = 0; i < IPA_IU_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_iu_ptr[i] = in_dword(IPA_IU_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_SRAM_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_sram_ptr[i] = in_dword(IPA_SRAM_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_MBOX_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_mbox_ptr[i] = in_dword(IPA_MBOX_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_HRAM_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_hram_ptr[i] = in_dword(IPA_HRAM_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_SEQ_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_seq_ptr[i] = in_dword(IPA_SEQ_ADDR + (i * sizeof(u32))); } for (i = 0; i < IPA_GSI_SIZE / sizeof(u32); i++) { ipa_reg_save.ipa.ipa_gsi_ptr[i] = in_dword(IPA_GSI_ADDR + (i * sizeof(u32))); } } ipa_reg_save_anomaly_check(); IPAERR("Completed\n"); Loading Loading @@ -1407,6 +1434,7 @@ int ipa_reg_save_init(u32 value) ipa_reg_save.ipa.testbus = NULL; if (ipa3_ctx->do_testbus_collection_on_crash) { memset(ipa_testbus_mem, value, sizeof(ipa_testbus_mem)); ipa_reg_save.ipa.testbus = (struct ipa_reg_save_ipa_testbus_s *) ipa_testbus_mem; } Loading @@ -1422,17 +1450,80 @@ int ipa_reg_save_init(u32 value) if (!ipa3_ctx->reg_collection_base) { IPAERR(":register collection ioremap err\n"); return -EFAULT; goto alloc_fail1; } num_regs -= (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * num_regs -= (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * IPA_REG_SAVE_NUM_EXTRA_ENDP_REGS); for (i = 0; i < (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * IPA_REG_SAVE_NUM_EXTRA_ENDP_REGS); i++) for (i = 0; i < (CONFIG_IPA3_REGDUMP_NUM_EXTRA_ENDP_REGS * IPA_REG_SAVE_NUM_EXTRA_ENDP_REGS); i++) *(ipa_regs_to_save_array[num_regs + i].dst_addr) = 0x0; ipa_reg_save.ipa.ipa_seq_ptr = NULL; ipa_reg_save.ipa.ipa_hram_ptr = NULL; ipa_reg_save.ipa.ipa_mbox_ptr = NULL; ipa_reg_save.ipa.ipa_sram_ptr = NULL; ipa_reg_save.ipa.ipa_iu_ptr = NULL; if (ipa3_ctx->do_ram_collection_on_crash) { ipa_reg_save.ipa.ipa_iu_ptr = alloc_and_init(IPA_IU_SIZE, value); if (!ipa_reg_save.ipa.ipa_iu_ptr) { IPAERR("ipa_iu_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_sram_ptr = alloc_and_init(IPA_SRAM_SIZE, value); if (!ipa_reg_save.ipa.ipa_sram_ptr) { IPAERR("ipa_sram_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_mbox_ptr = alloc_and_init(IPA_MBOX_SIZE, value); if (!ipa_reg_save.ipa.ipa_mbox_ptr) { IPAERR("ipa_mbox_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_hram_ptr = alloc_and_init(IPA_HRAM_SIZE, value); if (!ipa_reg_save.ipa.ipa_hram_ptr) { IPAERR("ipa_hram_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_seq_ptr = alloc_and_init(IPA_SEQ_SIZE, value); if (!ipa_reg_save.ipa.ipa_seq_ptr) { IPAERR("ipa_seq_ptr memory alloc failed\n"); goto alloc_fail2; } ipa_reg_save.ipa.ipa_gsi_ptr = alloc_and_init(IPA_GSI_SIZE, value); if (!ipa_reg_save.ipa.ipa_gsi_ptr) { IPAERR("ipa_gsi_ptr memory alloc failed\n"); goto alloc_fail2; } } return 0; alloc_fail2: kfree(ipa_reg_save.ipa.ipa_seq_ptr); kfree(ipa_reg_save.ipa.ipa_hram_ptr); kfree(ipa_reg_save.ipa.ipa_mbox_ptr); kfree(ipa_reg_save.ipa.ipa_sram_ptr); kfree(ipa_reg_save.ipa.ipa_iu_ptr); iounmap(ipa3_ctx->reg_collection_base); alloc_fail1: return -ENOMEM; } /* Loading
drivers/platform/msm/ipa/ipa_v3/dump/ipa_reg_dump.h +6 −0 Original line number Diff line number Diff line Loading @@ -1200,6 +1200,12 @@ struct ipa_regs_save_hierarchy_s { src_rsrc_cnt[IPA_HW_SRC_RSRP_TYPE_MAX]; struct ipa_reg_save_dst_rsrc_cnt_s dst_rsrc_cnt[IPA_HW_DST_RSRP_TYPE_MAX]; u32 *ipa_iu_ptr; u32 *ipa_sram_ptr; u32 *ipa_mbox_ptr; u32 *ipa_hram_ptr; u32 *ipa_seq_ptr; u32 *ipa_gsi_ptr; }; /* Top level GSI register save data struct */ Loading
drivers/platform/msm/ipa/ipa_v3/ipa.c +14 −1 Original line number Diff line number Diff line Loading @@ -5333,6 +5333,8 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, resource_p->do_non_tn_collection_on_crash; ipa3_ctx->secure_debug_check_action = resource_p->secure_debug_check_action; ipa3_ctx->do_ram_collection_on_crash = resource_p->do_ram_collection_on_crash; if (ipa3_ctx->secure_debug_check_action == USE_SCM) { if (ipa_is_mem_dump_allowed()) Loading Loading @@ -6309,8 +6311,19 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, IPADBG(": doing non-tn collection on crash = %u\n", ipa_drv_res->do_non_tn_collection_on_crash); /* * We'll read ram-collection-on-crash here... */ ipa_drv_res->do_ram_collection_on_crash = of_property_read_bool( pdev->dev.of_node, "qcom,ram-collection-on-crash"); IPADBG(": doing ram collection on crash = %u\n", ipa_drv_res->do_ram_collection_on_crash); if (ipa_drv_res->do_testbus_collection_on_crash || ipa_drv_res->do_non_tn_collection_on_crash) ipa_drv_res->do_non_tn_collection_on_crash || ipa_drv_res->do_ram_collection_on_crash) ipa_drv_res->do_register_collection_on_crash = true; IPADBG(": doing register collection on crash = %u\n", Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +12 −0 Original line number Diff line number Diff line Loading @@ -1699,6 +1699,7 @@ struct ipa3_context { bool do_register_collection_on_crash; bool do_testbus_collection_on_crash; bool do_non_tn_collection_on_crash; bool do_ram_collection_on_crash; u32 secure_debug_check_action; u32 sd_state; void __iomem *reg_collection_base; Loading Loading @@ -1751,6 +1752,7 @@ struct ipa3_plat_drv_res { bool do_register_collection_on_crash; bool do_testbus_collection_on_crash; bool do_non_tn_collection_on_crash; bool do_ram_collection_on_crash; u32 secure_debug_check_action; bool ipa_endp_delay_wa; }; Loading Loading @@ -2813,4 +2815,14 @@ static inline int ipa_mpm_reset_dma_mode(enum ipa_client_type src_pipe, #endif /* CONFIG_IPA3_MHI_PRIME_MANAGER */ static inline void *alloc_and_init(u32 size, u32 init_val) { void *ptr = kmalloc(size, GFP_KERNEL); if (ptr) memset(ptr, init_val, size); return ptr; } #endif /* _IPA3_I_H_ */