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Commit 7a37081e authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath9k_hw: simplify revision checks for AR9280 



Since AR9280 v1.0 was never sold (and the initvals removed), v1.0 specific
revision checks can be removed and the 'v2.0 or later' check can be
simplified to a check for AR9280 or later.

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 67e0208a

drivers/net/wireless/ath/ath9k/ar5008_phy.c

+7 −7
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq) 
	if (!AR_SREV_5416(ah) || synth_freq >= 3000)

		return;



	BUG_ON(AR_SREV_9280_10_OR_LATER(ah));

	BUG_ON(AR_SREV_9280_20_OR_LATER(ah));



	if (synth_freq < 2412)

		new_bias = 0;
@@ -454,7 +454,7 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah) 


	struct ath_common *common = ath9k_hw_common(ah);



	BUG_ON(AR_SREV_9280_10_OR_LATER(ah));

	BUG_ON(AR_SREV_9280_20_OR_LATER(ah));



	ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);

	ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
@@ -484,7 +484,7 @@ static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah) 
		bank = NULL; \

	} while (0);



	BUG_ON(AR_SREV_9280_10_OR_LATER(ah));

	BUG_ON(AR_SREV_9280_20_OR_LATER(ah));



	ATH_FREE_BANK(ah->analogBank0Data);

	ATH_FREE_BANK(ah->analogBank1Data);
@@ -525,7 +525,7 @@ static bool ar5008_hw_set_rf_regs(struct ath_hw *ah, 
	 * for single chip devices, that is AR9280 or anything

	 * after that.

	 */

	if (AR_SREV_9280_10_OR_LATER(ah))

	if (AR_SREV_9280_20_OR_LATER(ah))

		return true;



	/* Setup rf parameters */
@@ -663,7 +663,7 @@ static void ar5008_hw_override_ini(struct ath_hw *ah, 
	 */

	REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));



	if (AR_SREV_9280_10_OR_LATER(ah)) {

	if (AR_SREV_9280_20_OR_LATER(ah)) {

		val = REG_READ(ah, AR_PCU_MISC_MODE2);



		if (!AR_SREV_9271(ah))
@@ -676,7 +676,7 @@ static void ar5008_hw_override_ini(struct ath_hw *ah, 
	}



	if (!AR_SREV_5416_20_OR_LATER(ah) ||

	    AR_SREV_9280_10_OR_LATER(ah))

	    AR_SREV_9280_20_OR_LATER(ah))

		return;

	/*

	 * Disable BB clock gating
@@ -900,7 +900,7 @@ static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) 
	rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan))

		? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;



	if (!AR_SREV_9280_10_OR_LATER(ah))

	if (!AR_SREV_9280_20_OR_LATER(ah))

		rfMode |= (IS_CHAN_5GHZ(chan)) ?

			AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ;

drivers/net/wireless/ath/ath9k/ar9002_calib.c

+3 −3
Original line number Diff line number Diff line
@@ -841,7 +841,7 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) 
		if (!ar9285_hw_clc(ah, chan))

			return false;

	} else {

		if (AR_SREV_9280_10_OR_LATER(ah)) {

		if (AR_SREV_9280_20_OR_LATER(ah)) {

			if (!AR_SREV_9287_10_OR_LATER(ah))

				REG_CLR_BIT(ah, AR_PHY_ADC_CTL,

					    AR_PHY_ADC_CTL_OFF_PWDADC);
@@ -864,7 +864,7 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) 
			return false;

		}



		if (AR_SREV_9280_10_OR_LATER(ah)) {

		if (AR_SREV_9280_20_OR_LATER(ah)) {

			if (!AR_SREV_9287_10_OR_LATER(ah))

				REG_SET_BIT(ah, AR_PHY_ADC_CTL,

					    AR_PHY_ADC_CTL_OFF_PWDADC);
@@ -976,7 +976,7 @@ static void ar9002_hw_init_cal_settings(struct ath_hw *ah) 
	}



	if (AR_SREV_9160_10_OR_LATER(ah)) {

		if (AR_SREV_9280_10_OR_LATER(ah)) {

		if (AR_SREV_9280_20_OR_LATER(ah)) {

			ah->iq_caldata.calData = &iq_cal_single_sample;

			ah->adcgain_caldata.calData =

				&adc_gain_cal_single_sample;

drivers/net/wireless/ath/ath9k/ar9002_hw.c

+1 −1
Original line number Diff line number Diff line
@@ -569,7 +569,7 @@ void ar9002_hw_attach_ops(struct ath_hw *ah) 
	ops->config_pci_powersave = ar9002_hw_configpcipowersave;



	ar5008_hw_attach_phy_ops(ah);

	if (AR_SREV_9280_10_OR_LATER(ah))

	if (AR_SREV_9280_20_OR_LATER(ah))

		ar9002_hw_attach_phy_ops(ah);



	ar9002_hw_attach_calib_ops(ah);

drivers/net/wireless/ath/ath9k/eeprom_4k.c

+2 −2
Original line number Diff line number Diff line
@@ -333,7 +333,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah, 
		}



		if (i == 0) {

			if (AR_SREV_9280_10_OR_LATER(ah))

			if (AR_SREV_9280_20_OR_LATER(ah))

				ss = (int16_t)(0 - (minPwrT4[i] / 2));

			else

				ss = 0;
@@ -761,7 +761,7 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah, 


	regulatory->max_power_level = ratesArray[i];



	if (AR_SREV_9280_10_OR_LATER(ah)) {

	if (AR_SREV_9280_20_OR_LATER(ah)) {

		for (i = 0; i < Ar5416RateSize; i++)

			ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;

	}

drivers/net/wireless/ath/ath9k/eeprom_9287.c

+3 −3
Original line number Diff line number Diff line
@@ -324,7 +324,7 @@ static void ath9k_hw_get_ar9287_gain_boundaries_pdadcs(struct ath_hw *ah, 
		minDelta = 0;



		if (i == 0) {

			if (AR_SREV_9280_10_OR_LATER(ah))

			if (AR_SREV_9280_20_OR_LATER(ah))

				ss = (int16_t)(0 - (minPwrT4[i] / 2));

			else

				ss = 0;
@@ -883,7 +883,7 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, 
			ratesArray[i] = AR9287_MAX_RATE_POWER;

	}



	if (AR_SREV_9280_10_OR_LATER(ah)) {

	if (AR_SREV_9280_20_OR_LATER(ah)) {

		for (i = 0; i < Ar5416RateSize; i++)

			ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;

	}
@@ -977,7 +977,7 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, 
	else

		i = rate6mb;



	if (AR_SREV_9280_10_OR_LATER(ah))

	if (AR_SREV_9280_20_OR_LATER(ah))

		regulatory->max_power_level =

			ratesArray[i] + AR9287_PWR_TABLE_OFFSET_DB * 2;

	else