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Commit 7a348799 authored by Zhang Rui's avatar Zhang Rui
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Merge branches 'mediatek-mt2712', 'rockchip-rk3328' and 'uniphier-thermal' into thermal-soc

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+1 −0
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@@ -4,6 +4,7 @@ Required properties:
- compatible : should be "rockchip,<name>-tsadc"
- compatible : should be "rockchip,<name>-tsadc"
   "rockchip,rk3228-tsadc": found on RK3228 SoCs
   "rockchip,rk3228-tsadc": found on RK3228 SoCs
   "rockchip,rk3288-tsadc": found on RK3288 SoCs
   "rockchip,rk3288-tsadc": found on RK3288 SoCs
   "rockchip,rk3328-tsadc": found on RK3328 SoCs
   "rockchip,rk3368-tsadc": found on RK3368 SoCs
   "rockchip,rk3368-tsadc": found on RK3368 SoCs
   "rockchip,rk3399-tsadc": found on RK3399 SoCs
   "rockchip,rk3399-tsadc": found on RK3399 SoCs
- reg : physical base address of the controller and length of memory mapped
- reg : physical base address of the controller and length of memory mapped
+64 −0
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* UniPhier Thermal bindings

This describes the devicetree bindings for thermal monitor supported by
PVT(Process, Voltage and Temperature) monitoring unit implemented on Socionext
UniPhier SoCs.

Required properties:
- compatible :
  - "socionext,uniphier-pxs2-thermal" : For UniPhier PXs2 SoC
  - "socionext,uniphier-ld20-thermal" : For UniPhier LD20 SoC
- interrupts : IRQ for the temperature alarm
- #thermal-sensor-cells : Should be 0. See ./thermal.txt for details.

Optional properties:
- socionext,tmod-calibration: A pair of calibrated values referred from PVT,
                              in case that the values aren't set on SoC,
                              like a reference board.

Example:

	sysctrl@61840000 {
		compatible = "socionext,uniphier-ld20-sysctrl",
			     "simple-mfd", "syscon";
		reg = <0x61840000 0x10000>;
		...
		pvtctl: pvtctl {
			compatible = "socionext,uniphier-ld20-thermal";
			interrupts = <0 3 1>;
			#thermal-sensor-cells = <0>;
		};
		...
	};

	thermal-zones {
		cpu_thermal {
			polling-delay-passive = <250>;	/* 250ms */
			polling-delay = <1000>;		/* 1000ms */
			thermal-sensors = <&pvtctl>;

			trips {
				cpu_crit: cpu_crit {
					temperature = <110000>;	/* 110C */
					hysteresis = <2000>;
					type = "critical";
				};
				cpu_alert: cpu_alert {
					temperature = <100000>;	/* 100C */
					hysteresis = <2000>;
					type = "passive";
				};
			};

			cooling-maps {
				map0 {
					trip = <&cpu_alert>;
					cooling-device = <&cpu0 (-1) (-1)>;
				};
				map1 {
					trip = <&cpu_alert>;
					cooling-device = <&cpu2 (-1) (-1)>;
				};
			};
		};
	};
+8 −0
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@@ -473,4 +473,12 @@ config ZX2967_THERMAL
	  the primitive temperature sensor embedded in zx2967 SoCs.
	  the primitive temperature sensor embedded in zx2967 SoCs.
	  This sensor generates the real time die temperature.
	  This sensor generates the real time die temperature.


config UNIPHIER_THERMAL
	tristate "Socionext UniPhier thermal driver"
	depends on ARCH_UNIPHIER || COMPILE_TEST
	depends on THERMAL_OF && MFD_SYSCON
	help
	  Enable this to plug in UniPhier on-chip PVT thermal driver into the
	  thermal framework. The driver supports CPU thermal zone temperature
	  reporting and a couple of trip points.
endif
endif
+1 −0
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@@ -59,3 +59,4 @@ obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o
obj-$(CONFIG_MTK_THERMAL)	+= mtk_thermal.o
obj-$(CONFIG_MTK_THERMAL)	+= mtk_thermal.o
obj-$(CONFIG_GENERIC_ADC_THERMAL)	+= thermal-generic-adc.o
obj-$(CONFIG_GENERIC_ADC_THERMAL)	+= thermal-generic-adc.o
obj-$(CONFIG_ZX2967_THERMAL)	+= zx2967_thermal.o
obj-$(CONFIG_ZX2967_THERMAL)	+= zx2967_thermal.o
obj-$(CONFIG_UNIPHIER_THERMAL)	+= uniphier_thermal.o
+65 −0
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@@ -320,6 +320,44 @@ static const struct tsadc_table rk3288_code_table[] = {
	{0, 125000},
	{0, 125000},
};
};


static const struct tsadc_table rk3328_code_table[] = {
	{0, -40000},
	{296, -40000},
	{304, -35000},
	{313, -30000},
	{331, -20000},
	{340, -15000},
	{349, -10000},
	{359, -5000},
	{368, 0},
	{378, 5000},
	{388, 10000},
	{398, 15000},
	{408, 20000},
	{418, 25000},
	{429, 30000},
	{440, 35000},
	{451, 40000},
	{462, 45000},
	{473, 50000},
	{485, 55000},
	{496, 60000},
	{508, 65000},
	{521, 70000},
	{533, 75000},
	{546, 80000},
	{559, 85000},
	{572, 90000},
	{586, 95000},
	{600, 100000},
	{614, 105000},
	{629, 110000},
	{644, 115000},
	{659, 120000},
	{675, 125000},
	{TSADCV2_DATA_MASK, 125000},
};

static const struct tsadc_table rk3368_code_table[] = {
static const struct tsadc_table rk3368_code_table[] = {
	{0, -40000},
	{0, -40000},
	{106, -40000},
	{106, -40000},
@@ -790,6 +828,29 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
	},
	},
};
};


static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
	.chn_num = 1, /* one channels for tsadc */

	.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
	.tshut_temp = 95000,

	.initialize = rk_tsadcv2_initialize,
	.irq_ack = rk_tsadcv3_irq_ack,
	.control = rk_tsadcv3_control,
	.get_temp = rk_tsadcv2_get_temp,
	.set_alarm_temp = rk_tsadcv2_alarm_temp,
	.set_tshut_temp = rk_tsadcv2_tshut_temp,
	.set_tshut_mode = rk_tsadcv2_tshut_mode,

	.table = {
		.id = rk3328_code_table,
		.length = ARRAY_SIZE(rk3328_code_table),
		.data_mask = TSADCV2_DATA_MASK,
		.mode = ADC_INCREMENT,
	},
};

static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
@@ -874,6 +935,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = {
		.compatible = "rockchip,rk3288-tsadc",
		.compatible = "rockchip,rk3288-tsadc",
		.data = (void *)&rk3288_tsadc_data,
		.data = (void *)&rk3288_tsadc_data,
	},
	},
	{
		.compatible = "rockchip,rk3328-tsadc",
		.data = (void *)&rk3328_tsadc_data,
	},
	{
	{
		.compatible = "rockchip,rk3366-tsadc",
		.compatible = "rockchip,rk3366-tsadc",
		.data = (void *)&rk3366_tsadc_data,
		.data = (void *)&rk3366_tsadc_data,
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