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Commit 79e90dd5 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Lennert Buytenhek
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[ARM] Orion: nuke orion5x_{read,write} 



Nuke the Orion-specific orion5x_{read,write} wrappers.

Signed-off-by: default avatarLennert Buytenhek <buytenh@marvell.com>
parent 0e3bc050

arch/arm/mach-orion5x/addr-map.c

+9 −9
Original line number Diff line number Diff line
@@ -94,16 +94,16 @@ static void __init setup_cpu_win(int win, u32 base, u32 size, 
		return;

	}



	orion5x_write(CPU_WIN_BASE(win), base & 0xffff0000);

	orion5x_write(CPU_WIN_CTRL(win),

		((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1);

	writel(base & 0xffff0000, CPU_WIN_BASE(win));

	writel(((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1,

		CPU_WIN_CTRL(win));



	if (orion5x_cpu_win_can_remap(win)) {

		if (remap < 0)

			remap = base;



		orion5x_write(CPU_WIN_REMAP_LO(win), remap & 0xffff0000);

		orion5x_write(CPU_WIN_REMAP_HI(win), 0);

		writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win));

		writel(0, CPU_WIN_REMAP_HI(win));

	}

}
@@ -116,11 +116,11 @@ void __init orion5x_setup_cpu_mbus_bridge(void) 
	 * First, disable and clear windows.

	 */

	for (i = 0; i < 8; i++) {

		orion5x_write(CPU_WIN_BASE(i), 0);

		orion5x_write(CPU_WIN_CTRL(i), 0);

		writel(0, CPU_WIN_BASE(i));

		writel(0, CPU_WIN_CTRL(i));

		if (orion5x_cpu_win_can_remap(i)) {

			orion5x_write(CPU_WIN_REMAP_LO(i), 0);

			orion5x_write(CPU_WIN_REMAP_HI(i), 0);

			writel(0, CPU_WIN_REMAP_LO(i));

			writel(0, CPU_WIN_REMAP_HI(i));

		}

	}

arch/arm/mach-orion5x/db88f5281-setup.c

+1 −1
Original line number Diff line number Diff line
@@ -330,7 +330,7 @@ static void __init db88f5281_init(void) 
	orion5x_init();



	orion5x_mpp_conf(db88f5281_mpp_modes);

	orion5x_write(MPP_DEV_CTRL, 0);		/* DEV_D[31:16] */

	writel(0, MPP_DEV_CTRL);		/* DEV_D[31:16] */



	/*

	 * Configure peripherals.

arch/arm/mach-orion5x/dns323-setup.c

+1 −1
Original line number Diff line number Diff line
@@ -269,7 +269,7 @@ static void __init dns323_init(void) 
	orion5x_init();



	orion5x_mpp_conf(dns323_mpp_modes);

	orion5x_write(MPP_DEV_CTRL, 0);		/* DEV_D[31:16] */

	writel(0, MPP_DEV_CTRL);		/* DEV_D[31:16] */



	/*

	 * Configure peripherals.

arch/arm/mach-orion5x/gpio.c

+20 −20
Original line number Diff line number Diff line
@@ -96,10 +96,10 @@ int gpio_get_value(unsigned pin) 
{

	int val, mask = 1 << pin;



	if (orion5x_read(GPIO_IO_CONF) & mask)

		val = orion5x_read(GPIO_DATA_IN) ^ orion5x_read(GPIO_IN_POL);

	if (readl(GPIO_IO_CONF) & mask)

		val = readl(GPIO_DATA_IN) ^ readl(GPIO_IN_POL);

	else

		val = orion5x_read(GPIO_OUT);

		val = readl(GPIO_OUT);



	return val & mask;

}
@@ -191,39 +191,39 @@ void gpio_display(void) 
			printk("GPIO, free\n");

		} else {

			printk("GPIO, used by %s, ", gpio_label[i]);

			if (orion5x_read(GPIO_IO_CONF) & (1 << i)) {

			if (readl(GPIO_IO_CONF) & (1 << i)) {

				printk("input, active %s, level %s, edge %s\n",

				((orion5x_read(GPIO_IN_POL) >> i) & 1) ? "low" : "high",

				((orion5x_read(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked",

				((orion5x_read(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked");

				((readl(GPIO_IN_POL) >> i) & 1) ? "low" : "high",

				((readl(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked",

				((readl(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked");

			} else {

				printk("output, val=%d\n", (orion5x_read(GPIO_OUT) >> i) & 1);

				printk("output, val=%d\n", (readl(GPIO_OUT) >> i) & 1);

			}

		}

	}



	printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n",

				MPP_0_7_CTRL, orion5x_read(MPP_0_7_CTRL));

				MPP_0_7_CTRL, readl(MPP_0_7_CTRL));

	printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n",

				MPP_8_15_CTRL, orion5x_read(MPP_8_15_CTRL));

				MPP_8_15_CTRL, readl(MPP_8_15_CTRL));

	printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n",

				MPP_16_19_CTRL, orion5x_read(MPP_16_19_CTRL));

				MPP_16_19_CTRL, readl(MPP_16_19_CTRL));

	printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n",

				MPP_DEV_CTRL, orion5x_read(MPP_DEV_CTRL));

				MPP_DEV_CTRL, readl(MPP_DEV_CTRL));

	printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n",

				GPIO_OUT, orion5x_read(GPIO_OUT));

				GPIO_OUT, readl(GPIO_OUT));

	printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n",

				GPIO_IO_CONF, orion5x_read(GPIO_IO_CONF));

				GPIO_IO_CONF, readl(GPIO_IO_CONF));

	printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n",

				GPIO_BLINK_EN, orion5x_read(GPIO_BLINK_EN));

				GPIO_BLINK_EN, readl(GPIO_BLINK_EN));

	printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n",

				GPIO_IN_POL, orion5x_read(GPIO_IN_POL));

				GPIO_IN_POL, readl(GPIO_IN_POL));

	printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n",

				GPIO_DATA_IN, orion5x_read(GPIO_DATA_IN));

				GPIO_DATA_IN, readl(GPIO_DATA_IN));

	printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n",

				GPIO_LEVEL_MASK, orion5x_read(GPIO_LEVEL_MASK));

				GPIO_LEVEL_MASK, readl(GPIO_LEVEL_MASK));

	printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n",

				GPIO_EDGE_CAUSE, orion5x_read(GPIO_EDGE_CAUSE));

				GPIO_EDGE_CAUSE, readl(GPIO_EDGE_CAUSE));

	printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n",

				GPIO_EDGE_MASK, orion5x_read(GPIO_EDGE_MASK));

				GPIO_EDGE_MASK, readl(GPIO_EDGE_MASK));

}

arch/arm/mach-orion5x/irq.c

+9 −9
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type) 
	int pin = irq_to_gpio(irq);

	struct irq_desc *desc;



	if ((orion5x_read(GPIO_IO_CONF) & (1 << pin)) == 0) {

	if ((readl(GPIO_IO_CONF) & (1 << pin)) == 0) {

		printk(KERN_ERR "orion5x_gpio_set_irq_type failed "

				"(irq %d, pin %d).\n", irq, pin);

		return -EINVAL;
@@ -117,7 +117,7 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type) 
		/*

		 * set initial polarity based on current input level

		 */

		if ((orion5x_read(GPIO_IN_POL) ^ orion5x_read(GPIO_DATA_IN))

		if ((readl(GPIO_IN_POL) ^ readl(GPIO_DATA_IN))

		    & (1 << pin))

			orion5x_setbits(GPIO_IN_POL, (1 << pin)); /* falling */

		else
@@ -149,8 +149,8 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 


	BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31);

	offs = (irq - IRQ_ORION5X_GPIO_0_7) * 8;

	cause = (orion5x_read(GPIO_DATA_IN) & orion5x_read(GPIO_LEVEL_MASK)) |

		(orion5x_read(GPIO_EDGE_CAUSE) & orion5x_read(GPIO_EDGE_MASK));

	cause = (readl(GPIO_DATA_IN) & readl(GPIO_LEVEL_MASK)) |

		(readl(GPIO_EDGE_CAUSE) & readl(GPIO_EDGE_MASK));



	for (pin = offs; pin < offs + 8; pin++) {

		if (cause & (1 << pin)) {
@@ -158,9 +158,9 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 
			desc = irq_desc + irq;

			if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) {

				/* Swap polarity (race with GPIO line) */

				u32 polarity = orion5x_read(GPIO_IN_POL);

				u32 polarity = readl(GPIO_IN_POL);

				polarity ^= 1 << pin;

				orion5x_write(GPIO_IN_POL, polarity);

				writel(polarity, GPIO_IN_POL);

			}

			desc_handle_irq(irq, desc);

		}
@@ -175,9 +175,9 @@ static void __init orion5x_init_gpio_irq(void) 
	/*

	 * Mask and clear GPIO IRQ interrupts

	 */

	orion5x_write(GPIO_LEVEL_MASK, 0x0);

	orion5x_write(GPIO_EDGE_MASK, 0x0);

	orion5x_write(GPIO_EDGE_CAUSE, 0x0);

	writel(0x0, GPIO_LEVEL_MASK);

	writel(0x0, GPIO_EDGE_MASK);

	writel(0x0, GPIO_EDGE_CAUSE);



	/*

	 * Register chained level handlers for GPIO IRQs by default.