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Commit 7997f3b2 authored by Boris Brezillon's avatar Boris Brezillon Committed by Stephen Boyd
Browse files

clk: bcm2835: Protect sections updating shared registers 



CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock
handlers and must be accessed with ->regs_lock held.
Update the sections where this protection is missing.

Fixes: 41691b88 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: default avatarEric Anholt <eric@anholt.net>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 49012d1b

drivers/clk/bcm/clk-bcm2835.c

+4 −0
Original line number Diff line number Diff line
@@ -623,8 +623,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) 
		     ~A2W_PLL_CTRL_PWRDN);



	/* Take the PLL out of reset. */

	spin_lock(&cprman->regs_lock);

	cprman_write(cprman, data->cm_ctrl_reg,

		     cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);

	spin_unlock(&cprman->regs_lock);



	/* Wait for the PLL to lock. */

	timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS);
@@ -701,9 +703,11 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw, 
	}



	/* Unmask the reference clock from the oscillator. */

	spin_lock(&cprman->regs_lock);

	cprman_write(cprman, A2W_XOSC_CTRL,

		     cprman_read(cprman, A2W_XOSC_CTRL) |

		     data->reference_enable_mask);

	spin_unlock(&cprman->regs_lock);



	if (do_ana_setup_first)

		bcm2835_pll_write_ana(cprman, data->ana_reg_base, ana);