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Commit 79778a27 authored by James Bottomley's avatar James Bottomley Committed by James Bottomley
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[SCSI] aic7xxx: upport all sequencer and core fixes from adaptec version 6.3.9 



This patch upports all relevant code fixes and bumps the driver version
to 7.0 to signify starting a new tree.

Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent 52b5cfb3

Documentation/scsi/aic7xxx.txt

+5 −1
Original line number Diff line number Diff line 
====================================================================

=    Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v6.2.28   =

=    Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0      =

=                            README for                            =

=                     The Linux Operating System                   =

====================================================================
@@ -131,6 +131,10 @@ The following information is available in this file: 
      SCSI "stub" effects.



2. Version History

   7.0	  (4th August, 2005)

	- Updated driver to use SCSI transport class infrastructure

	- Upported sequencer and core fixes from last adaptec released

	  version of the driver.

   6.2.36 (June 3rd, 2003)

        - Correct code that disables PCI parity error checking.

        - Correct and simplify handling of the ignore wide residue

drivers/scsi/aic7xxx/aic7xxx.h

+2 −2
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ 
 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

 * POSSIBILITY OF SUCH DAMAGES.

 *

 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.h#79 $

 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.h#85 $

 *

 * $FreeBSD$

 */
@@ -243,7 +243,7 @@ typedef enum { 
	 */

	AHC_AIC7850_FE	= AHC_SPIOCAP|AHC_AUTOPAUSE|AHC_TARGETMODE|AHC_ULTRA,

	AHC_AIC7860_FE	= AHC_AIC7850_FE,

	AHC_AIC7870_FE	= AHC_TARGETMODE,

	AHC_AIC7870_FE	= AHC_TARGETMODE|AHC_AUTOPAUSE,

	AHC_AIC7880_FE	= AHC_AIC7870_FE|AHC_ULTRA,

	/*

	 * Although we have space for both the initiator and

drivers/scsi/aic7xxx/aic7xxx.reg

+2 −2
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ 
 *

 * $FreeBSD$

 */

VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#39 $"

VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $"



/*

 * This file is processed by the aic7xxx_asm utility for use in assembling
@@ -1306,7 +1306,6 @@ scratch_ram { 
	 */

	MWI_RESIDUAL {

		size		1

		alias	TARG_IMMEDIATE_SCB

	}

	/*

	 * SCBID of the next SCB to be started by the controller.
@@ -1461,6 +1460,7 @@ scratch_ram { 
	 */

	LAST_MSG {

		size		1

		alias	TARG_IMMEDIATE_SCB

	}



	/*

drivers/scsi/aic7xxx/aic7xxx.seq

+3 −2
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ 
 * $FreeBSD$

 */



VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#56 $"

VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $"

PATCH_ARG_LIST = "struct ahc_softc *ahc"

PREFIX = "ahc_"
@@ -679,6 +679,7 @@ await_busfree: 
		clr	SCSIBUSL;	/* Prevent bit leakage durint SELTO */

	}

	and	SXFRCTL0, ~SPIOEN;

	mvi	SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT;

	test	SSTAT1,REQINIT|BUSFREE	jz .;

	test	SSTAT1, BUSFREE jnz poll_for_work;

	mvi	MISSED_BUSFREE call set_seqint;
@@ -1097,7 +1098,7 @@ ultra2_dmahalt: 
		test	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz dma_mid_sg;

		if ((ahc->flags & AHC_TARGETROLE) != 0) {

			test	SSTAT0, TARGET jz dma_last_sg;

			if ((ahc->flags & AHC_TMODE_WIDEODD_BUG) != 0) {

			if ((ahc->bugs & AHC_TMODE_WIDEODD_BUG) != 0) {

				test	DMAPARAMS, DIRECTION jz dma_mid_sg;

			}

		}

drivers/scsi/aic7xxx/aic7xxx_93cx6.c

+27 −9
Original line number Diff line number Diff line
@@ -28,9 +28,7 @@ 
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

 * SUCH DAMAGE.

 *

 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.c#17 $

 *

 * $FreeBSD$

 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx_93cx6.c#19 $

 */



/*
@@ -64,7 +62,6 @@ 
 *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB

 *   first).  The clock cycling from low to high initiates the next data

 *   bit to be sent from the chip.

 *

 */



#ifdef __linux__
@@ -81,14 +78,22 @@ 
 * Right now, we only have to read the SEEPROM.  But we make it easier to

 * add other 93Cx6 functions.

 */

static struct seeprom_cmd {

struct seeprom_cmd {

  	uint8_t len;

 	uint8_t bits[9];

} seeprom_read = {3, {1, 1, 0}};

 	uint8_t bits[11];

};



/* Short opcodes for the c46 */

static struct seeprom_cmd seeprom_ewen = {9, {1, 0, 0, 1, 1, 0, 0, 0, 0}};

static struct seeprom_cmd seeprom_ewds = {9, {1, 0, 0, 0, 0, 0, 0, 0, 0}};



/* Long opcodes for the C56/C66 */

static struct seeprom_cmd seeprom_long_ewen = {11, {1, 0, 0, 1, 1, 0, 0, 0, 0}};

static struct seeprom_cmd seeprom_long_ewds = {11, {1, 0, 0, 0, 0, 0, 0, 0, 0}};



/* Common opcodes */

static struct seeprom_cmd seeprom_write = {3, {1, 0, 1}};

static struct seeprom_cmd seeprom_read  = {3, {1, 1, 0}};



/*

 * Wait for the SEERDY to go high; about 800 ns.
@@ -222,12 +227,25 @@ int 
ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf,

		  u_int start_addr, u_int count)

{

	struct seeprom_cmd *ewen, *ewds;

	uint16_t v;

	uint8_t temp;

	int i, k;



	/* Place the chip into write-enable mode */

	send_seeprom_cmd(sd, &seeprom_ewen);

	if (sd->sd_chip == C46) {

		ewen = &seeprom_ewen;

		ewds = &seeprom_ewds;

	} else if (sd->sd_chip == C56_66) {

		ewen = &seeprom_long_ewen;

		ewds = &seeprom_long_ewds;

	} else {

		printf("ahc_write_seeprom: unsupported seeprom type %d\n",

		       sd->sd_chip);

		return (0);

	}



	send_seeprom_cmd(sd, ewen);

	reset_seeprom(sd);



	/* Write all requested data out to the seeprom. */
@@ -277,7 +295,7 @@ ahc_write_seeprom(struct seeprom_descriptor *sd, uint16_t *buf, 
	}



	/* Put the chip back into write-protect mode */

	send_seeprom_cmd(sd, &seeprom_ewds);

	send_seeprom_cmd(sd, ewds);

	reset_seeprom(sd);



	return (1);