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Commit 797149d0 authored by David S. Miller's avatar David S. Miller
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Merge branch 'stmmac-DMA-burst'



Niklas Cassel says:

====================
net: stmmac: make DMA programmable burst length more configurable

Make DMA programmable burst length more configurable in the stmmac driver.

This is done by adding support for independent pbl for tx/rx through DT.
More fine grained tuning of pbl is possible thanks to a DT property saying
that we should NOT multiply pbl values by x8/x4 in hardware.

All new DT properties are optional, and created in a way that it will not
affect any existing DT configurations.

Changes since V1:
Created cover-letter.
Rebased patch set against next-20161205, since conflicting patches to
stmmac_platform.c has been merged since V1.

Changes since V2:
Moved default value initialization of pbl to stmmac_platform.c
and added a check for pbl != 0 in stmmac_main.c,
to catch a possble pbl == 0 from pci glue.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3f0dd6b7 4022d039
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+7 −1
Original line number Diff line number Diff line
@@ -34,7 +34,13 @@ Optional properties:
  platforms.
- tx-fifo-depth: See ethernet.txt file in the same directory
- rx-fifo-depth: See ethernet.txt file in the same directory
- snps,pbl		Programmable Burst Length
- snps,pbl		Programmable Burst Length (tx and rx)
- snps,txpbl		Tx Programmable Burst Length. Only for GMAC and newer.
			If set, DMA tx will use this value rather than snps,pbl.
- snps,rxpbl		Rx Programmable Burst Length. Only for GMAC and newer.
			If set, DMA rx will use this value rather than snps,pbl.
- snps,no-pbl-x8	Don't multiply the pbl/txpbl/rxpbl values by 8.
			For core rev < 3.50, don't multiply the values by 4.
- snps,aal		Address-Aligned Beats
- snps,fixed-burst	Program the DMA to use the fixed burst mode
- snps,mixed-burst	Program the DMA to use the mixed burst mode
+17 −7
Original line number Diff line number Diff line
@@ -152,8 +152,10 @@ Where:
 o dma_cfg: internal DMA parameters
   o pbl: the Programmable Burst Length is maximum number of beats to
       be transferred in one DMA transaction.
       GMAC also enables the 4xPBL by default.
   o fixed_burst/mixed_burst/burst_len
       GMAC also enables the 4xPBL by default. (8xPBL for GMAC 3.50 and newer)
   o txpbl/rxpbl: GMAC and newer supports independent DMA pbl for tx/rx.
   o pblx8: Enable 8xPBL (4xPBL for core rev < 3.50). Enabled by default.
   o fixed_burst/mixed_burst/aal
 o clk_csr: fixed CSR Clock range selection.
 o has_gmac: uses the GMAC core.
 o enh_desc: if sets the MAC will use the enhanced descriptor structure.
@@ -205,16 +207,24 @@ tuned according to the HW capabilities.

struct stmmac_dma_cfg {
	int pbl;
	int txpbl;
	int rxpbl;
	bool pblx8;
	int fixed_burst;
	int burst_len_supported;
	int mixed_burst;
	bool aal;
};

Where:
 o pbl: Programmable Burst Length
 o pbl: Programmable Burst Length (tx and rx)
 o txpbl: Transmit Programmable Burst Length. Only for GMAC and newer.
	 If set, DMA tx will use this value rather than pbl.
 o rxpbl: Receive Programmable Burst Length. Only for GMAC and newer.
	 If set, DMA rx will use this value rather than pbl.
 o pblx8: Enable 8xPBL (4xPBL for core rev < 3.50). Enabled by default.
 o fixed_burst: program the DMA to use the fixed burst mode
 o burst_len: this is the value we put in the register
	      supported values are provided as macros in
	      linux/stmmac.h header file.
 o mixed_burst: program the DMA to use the mixed burst mode
 o aal: Address-Aligned Beats

---

+2 −2
Original line number Diff line number Diff line
@@ -412,8 +412,8 @@ extern const struct stmmac_desc_ops ndesc_ops;
struct stmmac_dma_ops {
	/* DMA core initialization */
	int (*reset)(void __iomem *ioaddr);
	void (*init)(void __iomem *ioaddr, int pbl, int fb, int mb,
		     int aal, u32 dma_tx, u32 dma_rx, int atds);
	void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
		     u32 dma_tx, u32 dma_rx, int atds);
	/* Configure the AXI Bus Mode Register */
	void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
	/* Dump DMA registers */
+1 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ enum rx_tx_priority_ratio {

#define DMA_BUS_MODE_FB		0x00010000	/* Fixed burst */
#define DMA_BUS_MODE_MB		0x04000000	/* Mixed burst */
#define DMA_BUS_MODE_RPBL_MASK	0x003e0000	/* Rx-Programmable Burst Len */
#define DMA_BUS_MODE_RPBL_MASK	0x007e0000	/* Rx-Programmable Burst Len */
#define DMA_BUS_MODE_RPBL_SHIFT	17
#define DMA_BUS_MODE_USP	0x00800000
#define DMA_BUS_MODE_MAXPBL	0x01000000
+14 −12
Original line number Diff line number Diff line
@@ -84,37 +84,39 @@ static void dwmac1000_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)
	writel(value, ioaddr + DMA_AXI_BUS_MODE);
}

static void dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
			       int aal, u32 dma_tx, u32 dma_rx, int atds)
static void dwmac1000_dma_init(void __iomem *ioaddr,
			       struct stmmac_dma_cfg *dma_cfg,
			       u32 dma_tx, u32 dma_rx, int atds)
{
	u32 value = readl(ioaddr + DMA_BUS_MODE);
	int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
	int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;

	/*
	 * Set the DMA PBL (Programmable Burst Length) mode.
	 *
	 * Note: before stmmac core 3.50 this mode bit was 4xPBL, and
	 * post 3.5 mode bit acts as 8*PBL.
	 *
	 * This configuration doesn't take care about the Separate PBL
	 * so only the bits: 13-8 are programmed with the PBL passed from the
	 * platform.
	 */
	if (dma_cfg->pblx8)
		value |= DMA_BUS_MODE_MAXPBL;
	value &= ~DMA_BUS_MODE_PBL_MASK;
	value |= (pbl << DMA_BUS_MODE_PBL_SHIFT);
	value |= DMA_BUS_MODE_USP;
	value &= ~(DMA_BUS_MODE_PBL_MASK | DMA_BUS_MODE_RPBL_MASK);
	value |= (txpbl << DMA_BUS_MODE_PBL_SHIFT);
	value |= (rxpbl << DMA_BUS_MODE_RPBL_SHIFT);

	/* Set the Fixed burst mode */
	if (fb)
	if (dma_cfg->fixed_burst)
		value |= DMA_BUS_MODE_FB;

	/* Mixed Burst has no effect when fb is set */
	if (mb)
	if (dma_cfg->mixed_burst)
		value |= DMA_BUS_MODE_MB;

	if (atds)
		value |= DMA_BUS_MODE_ATDS;

	if (aal)
	if (dma_cfg->aal)
		value |= DMA_BUS_MODE_AAL;

	writel(value, ioaddr + DMA_BUS_MODE);
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