[PATCH] DEC PMAGB B framebuffer update (7901c799) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/video/pmagb-b-fb.c

+308 −109

Original line number	Diff line number	Diff line
		/*
		* linux/drivers/video/pmagb-b-fb.c
		*
		* PMAGB-B TurboChannel framebuffer card support ... derived from:
		* PMAGB-B TURBOchannel Smart Frame Buffer (SFB) card support,
		* derived from:
		* "HP300 Topcat framebuffer support (derived from macfb of all things)
		* Phil Blundell <philb@gnu.org> 1998", the original code can be
		* found in the file hpfb.c in the same directory.
		@@ -10,105 +11,118 @@
		* Michael Engel <engel@unix-ag.org>,
		* Karsten Merker <merker@linuxtag.org> and
		* Harald Koerfgen.
		* Copyright (c) 2005 Maciej W. Rozycki
		*
		* This file is subject to the terms and conditions of the GNU General
		* Public License. See the file COPYING in the main directory of this
		* archive for more details.
		*
		*/

		/*
		* We currently only support the PMAGB-B in high resolution mode
		* as I know of no way to detect low resolution mode set via jumper.
		* KM, 2001/01/07
		*/

		#include <linux/module.h>
		#include <linux/kernel.h>
		#include <linux/sched.h>
		#include <linux/errno.h>
		#include <linux/string.h>
		#include <linux/timer.h>
		#include <linux/mm.h>
		#include <linux/tty.h>
		#include <linux/slab.h>
		#include <linux/compiler.h>
		#include <linux/delay.h>
		#include <linux/init.h>
		#include <linux/errno.h>
		#include <linux/fb.h>
		#include <asm/bootinfo.h>
		#include <asm/dec/machtype.h>
		#include <linux/init.h>
		#include <linux/kernel.h>
		#include <linux/module.h>
		#include <linux/types.h>

		#include <asm/bug.h>
		#include <asm/io.h>
		#include <asm/system.h>

		#include <asm/dec/tc.h>

		#include <video/pmagb-b-fb.h>

		struct pmagb_b_ramdac_regs {
		unsigned char addr_low;
		unsigned char pad0[3];
		unsigned char addr_hi;
		unsigned char pad1[3];
		unsigned char data;
		unsigned char pad2[3];
		unsigned char cmap;

		struct pmagbbfb_par {
		struct fb_info *next;
		volatile void __iomem *mmio;
		volatile void __iomem *smem;
		volatile u32 __iomem *sfb;
		volatile u32 __iomem *dac;
		unsigned int osc0;
		unsigned int osc1;
		int slot;
		};

		/*
		* Max 3 TURBOchannel slots -> max 3 PMAGB-B :)
		*/
		static struct fb_info pmagbb_fb_info[3];

		static struct fb_var_screeninfo pmagbbfb_defined = {
		.xres = 1280,
		.yres = 1024,
		.xres_virtual = 1280,
		.yres_virtual = 1024,
		static struct fb_info *root_pmagbbfb_dev;

		static struct fb_var_screeninfo pmagbbfb_defined __initdata = {
		.bits_per_pixel = 8,
		.red.length = 8,
		.green.length = 8,
		.blue.length = 8,
		.activate = FB_ACTIVATE_NOW,
		.height = 274,
		.width = 195,
		.height = -1,
		.width = -1,
		.accel_flags = FB_ACCEL_NONE,
		.sync = FB_SYNC_ON_GREEN,
		.vmode = FB_VMODE_NONINTERLACED,
		};

		static struct fb_fix_screeninfo pmagbafb_fix = {
		static struct fb_fix_screeninfo pmagbbfb_fix __initdata = {
		.id = "PMAGB-BA",
		.smem_len = (1280 * 1024),
		.smem_len = (2048 * 1024),
		.type = FB_TYPE_PACKED_PIXELS,
		.visual = FB_VISUAL_PSEUDOCOLOR,
		.line_length = 1280,
		.mmio_len = PMAGB_B_FBMEM,
		};


		static inline void sfb_write(struct pmagbbfb_par *par, unsigned int reg, u32 v)
		{
		writel(v, par->sfb + reg / 4);
		}

		/*
		* Turn hardware cursor off
		*/
		void pmagbbfb_erase_cursor(struct pmagb_b_ramdac_regs *bt459_regs)
		static inline u32 sfb_read(struct pmagbbfb_par *par, unsigned int reg)
		{
		return readl(par->sfb + reg / 4);
		}

		static inline void dac_write(struct pmagbbfb_par *par, unsigned int reg, u8 v)
		{
		writeb(v, par->dac + reg / 4);
		}

		static inline u8 dac_read(struct pmagbbfb_par *par, unsigned int reg)
		{
		return readb(par->dac + reg / 4);
		}

		static inline void gp0_write(struct pmagbbfb_par *par, u32 v)
		{
		bt459_regs->addr_low = 0;
		bt459_regs->addr_hi = 3;
		bt459_regs->data = 0;
		writel(v, par->mmio + PMAGB_B_GP0);
		}


		/*
		* Set the palette.
		*/
		static int pmagbbfb_setcolreg(unsigned regno, unsigned red, unsigned green,
		unsigned blue, unsigned transp,
		struct fb_info *info)
		static int pmagbbfb_setcolreg(unsigned int regno, unsigned int red,
		unsigned int green, unsigned int blue,
		unsigned int transp, struct fb_info *info)
		{
		struct pmagb_b_ramdac_regs bt459_regs = (struct pmagb_b_ramdac_regs ) info->par;
		struct pmagbbfb_par *par = info->par;

		if (regno >= info->cmap.len)
		return 1;
		BUG_ON(regno >= info->cmap.len);

		red >>= 8; /* The cmap fields are 16 bits */
		green >>= 8; /* wide, but the harware colormap */
		green >>= 8; /* wide, but the hardware colormap */
		blue >>= 8; /* registers are only 8 bits wide */

		bt459_regs->addr_low = (__u8) regno;
		bt459_regs->addr_hi = 0;
		bt459_regs->cmap = red;
		bt459_regs->cmap = green;
		bt459_regs->cmap = blue;
		mb();
		dac_write(par, BT459_ADDR_LO, regno);
		dac_write(par, BT459_ADDR_HI, 0x00);
		wmb();
		dac_write(par, BT459_CMAP, red);
		wmb();
		dac_write(par, BT459_CMAP, green);
		wmb();
		dac_write(par, BT459_CMAP, blue);

		return 0;
		}

		@@ -121,62 +135,247 @@ static struct fb_ops pmagbbfb_ops = {
		.fb_cursor = soft_cursor,
		};

		int __init pmagbbfb_init_one(int slot)
		{
		unsigned long base_addr = get_tc_base_addr(slot);
		struct fb_info *info = &pmagbb_fb_info[slot];

		printk("PMAGB-BA framebuffer in slot %d\n", slot);
		/*
		* Framebuffer display memory base address and friends
		* Turn the hardware cursor off.
		*/
		pmagbbfb_fix.smem_start = base_addr + PMAGB_B_ONBOARD_FBMEM_OFFSET;
		info->par = (base_addr + PMAGB_B_BT459_OFFSET);
		static void __init pmagbbfb_erase_cursor(struct fb_info *info)
		{
		struct pmagbbfb_par *par = info->par;

		mb();
		dac_write(par, BT459_ADDR_LO, 0x00);
		dac_write(par, BT459_ADDR_HI, 0x03);
		wmb();
		dac_write(par, BT459_DATA, 0x00);
		}

		/*
		* Configure the Bt459 RAM DAC
		* Set up screen parameters.
		*/
		pmagbbfb_erase_cursor((struct pmagb_b_ramdac_regs *) info->par);
		static void __init pmagbbfb_screen_setup(struct fb_info *info)
		{
		struct pmagbbfb_par *par = info->par;

		info->var.xres = ((sfb_read(par, SFB_REG_VID_HOR) >>
		SFB_VID_HOR_PIX_SHIFT) & SFB_VID_HOR_PIX_MASK) * 4;
		info->var.xres_virtual = info->var.xres;
		info->var.yres = (sfb_read(par, SFB_REG_VID_VER) >>
		SFB_VID_VER_SL_SHIFT) & SFB_VID_VER_SL_MASK;
		info->var.yres_virtual = info->var.yres;
		info->var.left_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
		SFB_VID_HOR_BP_SHIFT) &
		SFB_VID_HOR_BP_MASK) * 4;
		info->var.right_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
		SFB_VID_HOR_FP_SHIFT) &
		SFB_VID_HOR_FP_MASK) * 4;
		info->var.upper_margin = (sfb_read(par, SFB_REG_VID_VER) >>
		SFB_VID_VER_BP_SHIFT) & SFB_VID_VER_BP_MASK;
		info->var.lower_margin = (sfb_read(par, SFB_REG_VID_VER) >>
		SFB_VID_VER_FP_SHIFT) & SFB_VID_VER_FP_MASK;
		info->var.hsync_len = ((sfb_read(par, SFB_REG_VID_HOR) >>
		SFB_VID_HOR_SYN_SHIFT) &
		SFB_VID_HOR_SYN_MASK) * 4;
		info->var.vsync_len = (sfb_read(par, SFB_REG_VID_VER) >>
		SFB_VID_VER_SYN_SHIFT) & SFB_VID_VER_SYN_MASK;

		info->fix.line_length = info->var.xres;
		};

		/*
		* Let there be consoles..
		* Determine oscillator configuration.
		*/
		static void __init pmagbbfb_osc_setup(struct fb_info *info)
		{
		static unsigned int pmagbbfb_freqs[] __initdata = {
		130808, 119843, 104000, 92980, 74367, 72800,
		69197, 66000, 65000, 50350, 36000, 32000, 25175
		};
		struct pmagbbfb_par *par = info->par;
		u32 count0 = 8, count1 = 8, counttc = 16 * 256 + 8;
		u32 freq0, freq1, freqtc = get_tc_speed() / 250;
		int i, j;

		gp0_write(par, 0); /* select Osc0 */
		for (j = 0; j < 16; j++) {
		mb();
		sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
		mb();
		for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
		if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
		break;
		udelay(1);
		}
		count0 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
		}

		gp0_write(par, 1); /* select Osc1 */
		for (j = 0; j < 16; j++) {
		mb();
		sfb_write(par, SFB_REG_TCCLK_COUNT, 0);

		for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
		if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
		break;
		udelay(1);
		}
		count1 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
		}

		freq0 = (freqtc * count0 + counttc / 2) / counttc;
		par->osc0 = freq0;
		if (freq0 >= pmagbbfb_freqs[0] - (pmagbbfb_freqs[0] + 32) / 64 &&
		freq0 <= pmagbbfb_freqs[0] + (pmagbbfb_freqs[0] + 32) / 64)
		par->osc0 = pmagbbfb_freqs[0];

		freq1 = (par->osc0 * count1 + count0 / 2) / count0;
		par->osc1 = freq1;
		for (i = 0; i < sizeof(pmagbbfb_freqs) / sizeof(*pmagbbfb_freqs); i++)
		if (freq1 >= pmagbbfb_freqs[i] -
		(pmagbbfb_freqs[i] + 128) / 256 &&
		freq1 <= pmagbbfb_freqs[i] +
		(pmagbbfb_freqs[i] + 128) / 256) {
		par->osc1 = pmagbbfb_freqs[i];
		break;
		}

		if (par->osc0 - par->osc1 <= (par->osc0 + par->osc1 + 256) / 512 \|\|
		par->osc1 - par->osc0 <= (par->osc0 + par->osc1 + 256) / 512)
		par->osc1 = 0;

		gp0_write(par, par->osc1 != 0); /* reselect OscX */

		info->var.pixclock = par->osc1 ?
		(1000000000 + par->osc1 / 2) / par->osc1 :
		(1000000000 + par->osc0 / 2) / par->osc0;
		};


		static int __init pmagbbfb_init_one(int slot)
		{
		char freq0[12], freq1[12];
		struct fb_info *info;
		struct pmagbbfb_par *par;
		unsigned long base_addr;
		u32 vid_base;

		info = framebuffer_alloc(sizeof(struct pmagbbfb_par), NULL);
		if (!info)
		return -ENOMEM;

		par = info->par;
		par->slot = slot;
		claim_tc_card(par->slot);

		base_addr = get_tc_base_addr(par->slot);

		par->next = root_pmagbbfb_dev;
		root_pmagbbfb_dev = info;

		if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
		goto err_alloc;

		info->fbops = &pmagbbfb_ops;
		info->var = pmagbbfb_defined;
		info->fix = pmagbbfb_fix;
		info->screen_base = pmagbbfb_fix.smem_start;
		info->var = pmagbbfb_defined;
		info->flags = FBINFO_DEFAULT;

		fb_alloc_cmap(&fb_info.cmap, 256, 0);
		/* MMIO mapping setup. */
		info->fix.mmio_start = base_addr;
		par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
		if (!par->mmio)
		goto err_cmap;
		par->sfb = par->mmio + PMAGB_B_SFB;
		par->dac = par->mmio + PMAGB_B_BT459;

		/* Frame buffer mapping setup. */
		info->fix.smem_start = base_addr + PMAGB_B_FBMEM;
		par->smem = ioremap_nocache(info->fix.smem_start, info->fix.smem_len);
		if (!par->smem)
		goto err_mmio_map;
		vid_base = sfb_read(par, SFB_REG_VID_BASE);
		info->screen_base = (void __iomem )par->smem + vid_base 0x1000;
		info->screen_size = info->fix.smem_len - 2 * vid_base * 0x1000;

		pmagbbfb_erase_cursor(info);
		pmagbbfb_screen_setup(info);
		pmagbbfb_osc_setup(info);

		if (register_framebuffer(info) < 0)
		return 1;
		goto err_smem_map;

		snprintf(freq0, sizeof(freq0), "%u.%03uMHz",
		par->osc0 / 1000, par->osc0 % 1000);
		snprintf(freq1, sizeof(freq1), "%u.%03uMHz",
		par->osc1 / 1000, par->osc1 % 1000);

		pr_info("fb%d: %s frame buffer device in slot %d\n",
		info->node, info->fix.id, par->slot);
		pr_info("fb%d: Osc0: %s, Osc1: %s, Osc%u selected\n",
		info->node, freq0, par->osc1 ? freq1 : "disabled",
		par->osc1 != 0);

		return 0;


		err_smem_map:
		iounmap(par->smem);

		err_mmio_map:
		iounmap(par->mmio);

		err_cmap:
		fb_dealloc_cmap(&info->cmap);

		err_alloc:
		root_pmagbbfb_dev = par->next;
		release_tc_card(par->slot);
		framebuffer_release(info);
		return -ENXIO;
		}

		static void __exit pmagbbfb_exit_one(void)
		{
		struct fb_info *info = root_pmagbbfb_dev;
		struct pmagbbfb_par *par = info->par;

		unregister_framebuffer(info);
		iounmap(par->smem);
		iounmap(par->mmio);
		fb_dealloc_cmap(&info->cmap);
		root_pmagbbfb_dev = par->next;
		release_tc_card(par->slot);
		framebuffer_release(info);
		}


		/*
		* Initialise the framebuffer
		* Initialise the framebuffer.
		*/

		int __init pmagbbfb_init(void)
		static int __init pmagbbfb_init(void)
		{
		int sid;
		int found = 0;
		int count = 0;
		int slot;

		if (fb_get_options("pmagbbfb", NULL))
		return -ENODEV;
		return -ENXIO;

		if (TURBOCHANNEL) {
		while ((sid = search_tc_card("PMAGB-BA")) >= 0) {
		found = 1;
		claim_tc_card(sid);
		pmagbbfb_init_one(sid);
		while ((slot = search_tc_card("PMAGB-BA")) >= 0) {
		if (pmagbbfb_init_one(slot) < 0)
		break;
		count++;
		}
		return found ? 0 : -ENODEV;
		} else {
		return -ENODEV;
		return (count > 0) ? 0 : -ENXIO;
		}

		static void __exit pmagbbfb_exit(void)
		{
		while (root_pmagbbfb_dev)
		pmagbbfb_exit_one();
		}


		module_init(pmagbbfb_init);
		module_exit(pmagbbfb_exit);

		MODULE_LICENSE("GPL");

include/video/pmagb-b-fb.h

+50 −24

Original line number	Diff line number	Diff line
		/*
		* linux/drivers/video/pmagb-b-fb.h
		* linux/include/video/pmagb-b-fb.h
		*
		* TurboChannel PMAGB-B framebuffer card support,
		* TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
		* Copyright (C) 1999, 2000, 2001 by
		* Michael Engel <engel@unix-ag.org> and
		* Karsten Merker <merker@linuxtag.org>
		* Copyright (c) 2005 Maciej W. Rozycki
		*
		* This file is subject to the terms and conditions of the GNU General
		* Public License. See the file COPYING in the main directory of this
		* archive for more details.
		*/

		/* IOmem resource offsets. */
		#define PMAGB_B_ROM 0x000000 /* REX option ROM */
		#define PMAGB_B_SFB 0x100000 /* SFB ASIC */
		#define PMAGB_B_GP0 0x140000 /* general purpose output 0 */
		#define PMAGB_B_GP1 0x180000 /* general purpose output 1 */
		#define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */
		#define PMAGB_B_FBMEM 0x200000 /* frame buffer */
		#define PMAGB_B_SIZE 0x400000 /* address space size */

		/*
		* Bt459 RAM DAC register base offset (rel. to TC slot base address)
		*/
		#define PMAGB_B_BT459_OFFSET 0x001C0000
		/* IOmem register offsets. */
		#define SFB_REG_VID_HOR 0x64 /* video horizontal setup */
		#define SFB_REG_VID_VER 0x68 /* video vertical setup */
		#define SFB_REG_VID_BASE 0x6c /* video base address */
		#define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */
		#define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */

		/*
		* Begin of PMAGB-B framebuffer memory, resolution is configurable:
		* 1024x864x8 or 1280x1024x8, settable by jumper on the card
		*/
		#define PMAGB_B_ONBOARD_FBMEM_OFFSET 0x00201000
		/* Video horizontal setup register constants. All bits are r/w. */
		#define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */
		#define SFB_VID_HOR_BP_MASK 0x7f
		#define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */
		#define SFB_VID_HOR_SYN_MASK 0x7f
		#define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */
		#define SFB_VID_HOR_FP_MASK 0x1f
		#define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */
		#define SFB_VID_HOR_PIX_MASK 0x1ff

		/*
		* Bt459 register offsets, byte-wide registers
		*/
		/* Video vertical setup register constants. All bits are r/w. */
		#define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */
		#define SFB_VID_VER_BP_MASK 0x3f
		#define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */
		#define SFB_VID_VER_SYN_MASK 0x3f
		#define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */
		#define SFB_VID_VER_FP_MASK 0x1f
		#define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */
		#define SFB_VID_VER_SL_MASK 0x7ff

		/* Video base address register constants. All bits are r/w. */
		#define SFB_VID_BASE_MASK 0x1ff /* video base row address */

		#define BT459_ADR_LOW BT459_OFFSET + 0x00 /* addr. low */
		#define BT459_ADR_HIGH BT459_OFFSET + 0x04 /* addr. high */
		#define BT459_DATA BT459_OFFSET + 0x08 /* r/w data */
		#define BT459_CMAP BT459_OFFSET + 0x0C /* color map */
		/* Bt459 register offsets, byte-wide registers. */
		#define BT459_ADDR_LO 0x0 /* address low */
		#define BT459_ADDR_HI 0x4 /* address high */
		#define BT459_DATA 0x8 /* data window register */
		#define BT459_CMAP 0xc /* color map window register */