Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 784fe39f authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-intel-fixes' of ssh://master.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel 

* 'drm-intel-fixes' of ssh://master.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel: (37 commits)
  drm/i915/execbuffer: Reorder binding of objects to favour restrictions
  drm/i915: If we hit OOM when allocating GTT pages, clear the aperture
  drm/i915/evict: Ensure we completely cleanup on failure
  drm/i915/execbuffer: Correctly clear the current object list upon EFAULT
  drm/i915/debugfs: Show all objects in the gtt
  drm/i915: Record AGP memory type upon error
  drm/i915: Periodically flush the active lists and requests
  drm/i915/gtt: Unmap the PCI pages after unbinding them from the GTT
  drm/i915: Record the error batchbuffer on each ring
  drm/i915: Include TLB miss overhead for computing WM
  drm/i915: Propagate error from flushing the ring
  drm/i915: detect & report PCH display error interrupts
  drm/i915: cleanup rc6 code
  drm/i915: fix rc6 enabling around suspend/resume
  drm/i915: re-enable rc6 support for Ironlake+
  drm/i915: Make the ring IMR handling private
  drm/i915/ringbuffer: Simplify the ring irq refcounting
  drm/i915/debugfs: Show the per-ring IMR
  drm/i915: Mask USER interrupts on gen6 (until required)
  drm/i915: Handle ringbuffer stalls when flushing
  ...
parents 4162cf64 6fe4f140

drivers/char/agp/intel-agp.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -94,6 +94,8 @@ 
#define G4x_GMCH_SIZE_VT_1_5M	(0xa << 8)

#define G4x_GMCH_SIZE_VT_1_5M	(0xa << 8)

#define G4x_GMCH_SIZE_VT_2M	(0xc << 8)

#define G4x_GMCH_SIZE_VT_2M	(0xc << 8)





#define GFX_FLSH_CNTL		0x2170 /* 915+ */



#define I810_DRAM_CTL		0x3000

#define I810_DRAM_CTL		0x3000

#define I810_DRAM_ROW_0		0x00000001

#define I810_DRAM_ROW_0		0x00000001

#define I810_DRAM_ROW_0_SDRAM	0x00000001

#define I810_DRAM_ROW_0_SDRAM	0x00000001

drivers/char/agp/intel-gtt.c

+9 −0
Original line number Original line Diff line number Diff line
@@ -814,6 +814,12 @@ static bool intel_enable_gtt(void) 
		}

		}

	}

	}





	/* On the resume path we may be adjusting the PGTBL value, so

	 * be paranoid and flush all chipset write buffers...

	 */

	if (INTEL_GTT_GEN >= 3)

		writel(0, intel_private.registers+GFX_FLSH_CNTL);



	reg = intel_private.registers+I810_PGETBL_CTL;

	reg = intel_private.registers+I810_PGETBL_CTL;

	writel(intel_private.PGETBL_save, reg);

	writel(intel_private.PGETBL_save, reg);

	if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) {

	if (HAS_PGTBL_EN && (readl(reg) & I810_PGETBL_ENABLED) == 0) {
@@ -823,6 +829,9 @@ static bool intel_enable_gtt(void) 
		return false;

		return false;

	}

	}





	if (INTEL_GTT_GEN >= 3)

		writel(0, intel_private.registers+GFX_FLSH_CNTL);



	return true;

	return true;

}

}

drivers/gpu/drm/i915/i915_debugfs.c

+81 −6
Original line number Original line Diff line number Diff line
@@ -106,10 +106,19 @@ static const char *get_tiling_flag(struct drm_i915_gem_object *obj) 
    }

    }

}

}





static const char *agp_type_str(int type)

{

	switch (type) {

	case 0: return " uncached";

	case 1: return " snooped";

	default: return "";

	}

}



static void

static void

describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)

describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)

{

{

	seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s",

	seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s",

		   &obj->base,

		   &obj->base,

		   get_pin_flag(obj),

		   get_pin_flag(obj),

		   get_tiling_flag(obj),

		   get_tiling_flag(obj),
@@ -118,6 +127,7 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) 
		   obj->base.write_domain,

		   obj->base.write_domain,

		   obj->last_rendering_seqno,

		   obj->last_rendering_seqno,

		   obj->last_fenced_seqno,

		   obj->last_fenced_seqno,

		   agp_type_str(obj->agp_type == AGP_USER_CACHED_MEMORY),

		   obj->dirty ? " dirty" : "",

		   obj->dirty ? " dirty" : "",

		   obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");

		   obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");

	if (obj->base.name)

	if (obj->base.name)
@@ -276,6 +286,37 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
	return 0;

	return 0;

}

}





static int i915_gem_gtt_info(struct seq_file *m, void* data)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_gem_object *obj;

	size_t total_obj_size, total_gtt_size;

	int count, ret;



	ret = mutex_lock_interruptible(&dev->struct_mutex);

	if (ret)

		return ret;



	total_obj_size = total_gtt_size = count = 0;

	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {

		seq_printf(m, "   ");

		describe_obj(m, obj);

		seq_printf(m, "\n");

		total_obj_size += obj->base.size;

		total_gtt_size += obj->gtt_space->size;

		count++;

	}



	mutex_unlock(&dev->struct_mutex);



	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",

		   count, total_obj_size, total_gtt_size);



	return 0;

}







static int i915_gem_pageflip_info(struct seq_file *m, void *data)

static int i915_gem_pageflip_info(struct seq_file *m, void *data)

{

{
@@ -456,8 +497,14 @@ static int i915_interrupt_info(struct seq_file *m, void *data) 
	}

	}

	seq_printf(m, "Interrupts received: %d\n",

	seq_printf(m, "Interrupts received: %d\n",

		   atomic_read(&dev_priv->irq_received));

		   atomic_read(&dev_priv->irq_received));

	for (i = 0; i < I915_NUM_RINGS; i++)

	for (i = 0; i < I915_NUM_RINGS; i++) {

		if (IS_GEN6(dev)) {

			seq_printf(m, "Graphics Interrupt mask (%s):	%08x\n",

				   dev_priv->ring[i].name,

				   I915_READ_IMR(&dev_priv->ring[i]));

		}

		i915_ring_seqno_info(m, &dev_priv->ring[i]);

		i915_ring_seqno_info(m, &dev_priv->ring[i]);

	}

	mutex_unlock(&dev->struct_mutex);

	mutex_unlock(&dev->struct_mutex);





	return 0;

	return 0;
@@ -656,7 +703,7 @@ static void print_error_buffers(struct seq_file *m, 
	seq_printf(m, "%s [%d]:\n", name, count);

	seq_printf(m, "%s [%d]:\n", name, count);





	while (count--) {

	while (count--) {

		seq_printf(m, "  %08x %8zd %04x %04x %08x%s%s%s%s%s",

		seq_printf(m, "  %08x %8zd %04x %04x %08x%s%s%s%s%s%s",

			   err->gtt_offset,

			   err->gtt_offset,

			   err->size,

			   err->size,

			   err->read_domains,

			   err->read_domains,
@@ -666,7 +713,8 @@ static void print_error_buffers(struct seq_file *m, 
			   tiling_flag(err->tiling),

			   tiling_flag(err->tiling),

			   dirty_flag(err->dirty),

			   dirty_flag(err->dirty),

			   purgeable_flag(err->purgeable),

			   purgeable_flag(err->purgeable),

			   ring_str(err->ring));

			   ring_str(err->ring),

			   agp_type_str(err->agp_type));





		if (err->name)

		if (err->name)

			seq_printf(m, " (name: %d)", err->name);

			seq_printf(m, " (name: %d)", err->name);
@@ -744,7 +792,9 @@ static int i915_error_state(struct seq_file *m, void *unused) 
		if (error->batchbuffer[i]) {

		if (error->batchbuffer[i]) {

			struct drm_i915_error_object *obj = error->batchbuffer[i];

			struct drm_i915_error_object *obj = error->batchbuffer[i];





			seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);

			seq_printf(m, "%s --- gtt_offset = 0x%08x\n",

				   dev_priv->ring[i].name,

				   obj->gtt_offset);

			offset = 0;

			offset = 0;

			for (page = 0; page < obj->page_count; page++) {

			for (page = 0; page < obj->page_count; page++) {

				for (elt = 0; elt < PAGE_SIZE/4; elt++) {

				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
@@ -890,7 +940,7 @@ static int i915_drpc_info(struct seq_file *m, void *unused) 
	struct drm_device *dev = node->minor->dev;

	struct drm_device *dev = node->minor->dev;

	drm_i915_private_t *dev_priv = dev->dev_private;

	drm_i915_private_t *dev_priv = dev->dev_private;

	u32 rgvmodectl = I915_READ(MEMMODECTL);

	u32 rgvmodectl = I915_READ(MEMMODECTL);

	u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);

	u32 rstdbyctl = I915_READ(RSTDBYCTL);

	u16 crstandvid = I915_READ16(CRSTANDVID);

	u16 crstandvid = I915_READ16(CRSTANDVID);





	seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?

	seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
@@ -913,6 +963,30 @@ static int i915_drpc_info(struct seq_file *m, void *unused) 
	seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));

	seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));

	seq_printf(m, "Render standby enabled: %s\n",

	seq_printf(m, "Render standby enabled: %s\n",

		   (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");

		   (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");

	seq_printf(m, "Current RS state: ");

	switch (rstdbyctl & RSX_STATUS_MASK) {

	case RSX_STATUS_ON:

		seq_printf(m, "on\n");

		break;

	case RSX_STATUS_RC1:

		seq_printf(m, "RC1\n");

		break;

	case RSX_STATUS_RC1E:

		seq_printf(m, "RC1E\n");

		break;

	case RSX_STATUS_RS1:

		seq_printf(m, "RS1\n");

		break;

	case RSX_STATUS_RS2:

		seq_printf(m, "RS2 (RC6)\n");

		break;

	case RSX_STATUS_RS3:

		seq_printf(m, "RC3 (RC6+)\n");

		break;

	default:

		seq_printf(m, "unknown\n");

		break;

	}





	return 0;

	return 0;

}

}
@@ -1187,6 +1261,7 @@ static int i915_wedged_create(struct dentry *root, struct drm_minor *minor) 
static struct drm_info_list i915_debugfs_list[] = {

static struct drm_info_list i915_debugfs_list[] = {

	{"i915_capabilities", i915_capabilities, 0, 0},

	{"i915_capabilities", i915_capabilities, 0, 0},

	{"i915_gem_objects", i915_gem_object_info, 0},

	{"i915_gem_objects", i915_gem_object_info, 0},

	{"i915_gem_gtt", i915_gem_gtt_info, 0},

	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},

	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},

	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},

	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},

	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},

	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},

drivers/gpu/drm/i915/i915_dma.c

+0 −8
Original line number Original line Diff line number Diff line
@@ -1962,13 +1962,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	/* enable GEM by default */

	/* enable GEM by default */

	dev_priv->has_gem = 1;

	dev_priv->has_gem = 1;





	if (dev_priv->has_gem == 0 &&

	    drm_core_check_feature(dev, DRIVER_MODESET)) {

		DRM_ERROR("kernel modesetting requires GEM, disabling driver.\n");

		ret = -ENODEV;

		goto out_workqueue_free;

	}



	dev->driver->get_vblank_counter = i915_get_vblank_counter;

	dev->driver->get_vblank_counter = i915_get_vblank_counter;

	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */

	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */

	if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {

	if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {
@@ -2055,7 +2048,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 




	intel_teardown_gmbus(dev);

	intel_teardown_gmbus(dev);

	intel_teardown_mchbar(dev);

	intel_teardown_mchbar(dev);

out_workqueue_free:

	destroy_workqueue(dev_priv->wq);

	destroy_workqueue(dev_priv->wq);

out_iomapfree:

out_iomapfree:

	io_mapping_free(dev_priv->mm.gtt_mapping);

	io_mapping_free(dev_priv->mm.gtt_mapping);

drivers/gpu/drm/i915/i915_drv.c

+9 −0
Original line number Original line Diff line number Diff line
@@ -49,6 +49,9 @@ module_param_named(powersave, i915_powersave, int, 0600); 
unsigned int i915_lvds_downclock = 0;

unsigned int i915_lvds_downclock = 0;

module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);

module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);





bool i915_try_reset = true;

module_param_named(reset, i915_try_reset, bool, 0600);



static struct drm_driver driver;

static struct drm_driver driver;

extern int intel_agp_enabled;

extern int intel_agp_enabled;
@@ -352,6 +355,9 @@ static int i915_drm_thaw(struct drm_device *dev) 




		/* Resume the modeset for every activated CRTC */

		/* Resume the modeset for every activated CRTC */

		drm_helper_resume_force_mode(dev);

		drm_helper_resume_force_mode(dev);



		if (dev_priv->renderctx && dev_priv->pwrctx)

			ironlake_enable_rc6(dev);

	}

	}





	intel_opregion_init(dev);

	intel_opregion_init(dev);
@@ -475,6 +481,9 @@ int i915_reset(struct drm_device *dev, u8 flags) 
	bool need_display = true;

	bool need_display = true;

	int ret;

	int ret;





	if (!i915_try_reset)

		return 0;



	if (!mutex_trylock(&dev->struct_mutex))

	if (!mutex_trylock(&dev->struct_mutex))

		return -EBUSY;

		return -EBUSY;