Commit 76958a61 authored Jun 15, 2012 by Robert Richter Committed by Ingo Molnar Jun 18, 2012

perf/x86/amd: Fix RDPMC index calculation for AMD family 15h



The RDPMC index calculation is wrong for AMD family 15h
(X86_FEATURE_ PERFCTR_CORE set). This leads to a #GP when
accessing the counter:

 Pid: 2237, comm: syslog-ng Not tainted 3.5.0-rc1-perf-x86_64-standard-g130ff90 #135 AMD Pike/Pike
 RIP: 0010:[<ffffffff8100dc33>]  [<ffffffff8100dc33>] x86_perf_event_update+0x27/0x66

While the msr address offset is (index << 1) we must use index to
select the correct rdpmc.

Signed-off-by: Robert Richter <robert.richter@amd.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Vince Weaver <vweaver1@eecs.utk.edu>
Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent 4983955c

arch/x86/kernel/cpu/perf_event.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -823,7 +823,7 @@ static inline void x86_assign_hw_event(struct perf_event *event,
		} else {
		hwc->config_base = x86_pmu_config_addr(hwc->idx);
		hwc->event_base = x86_pmu_event_addr(hwc->idx);
		hwc->event_base_rdpmc = x86_pmu_addr_offset(hwc->idx);
		hwc->event_base_rdpmc = hwc->idx;
		}
		}