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Commit 7674bf96 authored by Joel Stanley's avatar Joel Stanley
Browse files

ARM: dts: aspeed: Add LPC clock phandles 



The LPC device uses LCLK.

Tested-by: default avatarLei YU <mine260309@gmail.com>
Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent 542d2f45

arch/arm/boot/dts/aspeed-g4.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -233,6 +233,7 @@ 
					lpc_ctrl: lpc-ctrl@0 {

						compatible = "aspeed,ast2400-lpc-ctrl";

						reg = <0x0 0x80>;

						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;

						status = "disabled";

					};

arch/arm/boot/dts/aspeed-g5.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -283,6 +283,7 @@ 
					lpc_ctrl: lpc-ctrl@0 {

						compatible = "aspeed,ast2500-lpc-ctrl";

						reg = <0x0 0x80>;

						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;

						status = "disabled";

					};