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Commit 757e3c16 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: pci: Rewrite SH7751 PCI support to follow SH7780. 



This follows the similar sort of scheme that the refactored SH7780 code
uses, using a 64MB CS3 mapping to handle the window0 case, and simply
discarding window1. This vastly simplifies the code, and allows most of
the board-specific setup to go die.

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent a5b08047

arch/sh/drivers/pci/Kconfig

+2 −1
Original line number Diff line number Diff line
@@ -23,7 +23,8 @@ config PCI_NEW 
	bool

	depends on PCI

	default y if CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7780 || \

		     CPU_SUBTYPE_SH7785 || CPU_SH5

		     CPU_SUBTYPE_SH7785 || CPU_SH5 || \

		     CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R



# This is also board-specific

config PCI_AUTO

arch/sh/drivers/pci/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 
					   pci-dreamcast.o

obj-$(CONFIG_SH_SECUREEDGE5410)		+= ops-snapgear.o

obj-$(CONFIG_SH_RTS7751R2D)		+= ops-rts7751r2d.o fixups-rts7751r2d.o

obj-$(CONFIG_SH_SH03)			+= ops-sh03.o fixups-sh03.o

obj-$(CONFIG_SH_SH03)			+= fixups-sh03.o

obj-$(CONFIG_SH_HIGHLANDER)		+= fixups-r7780rp.o

obj-$(CONFIG_SH_SH7785LCR)		+= fixups-r7780rp.o

obj-$(CONFIG_SH_SDK7780)		+= fixups-sdk7780.o

arch/sh/drivers/pci/ops-landisk.c

+0 −31
Original line number Diff line number Diff line
@@ -15,37 +15,6 @@ 
#include <linux/pci.h>

#include "pci-sh4.h"



static struct resource sh7751_io_resource = {

	.name = "SH7751 IO",

	.start = SH7751_PCI_IO_BASE,

	.end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,

	.flags = IORESOURCE_IO

};



static struct resource sh7751_mem_resource = {

	.name = "SH7751 mem",

	.start = SH7751_PCI_MEMORY_BASE,

	.end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,

	.flags = IORESOURCE_MEM

};



struct pci_channel board_pci_channels[] = {

	{ sh7751_pci_init, &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0x3ff},

	{NULL, NULL, NULL, 0, 0},

};



static struct sh4_pci_address_map sh7751_pci_map = {

	.window0 = {

		.base	= SH7751_CS3_BASE_ADDR,

		.size	= (64 << 20),	/* 64MB */

	},

};



int __init pcibios_init_platform(void)

{

	return sh7751_pcic_init(&board_pci_channels[0], &sh7751_pci_map);

}



int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)

{

	/*

arch/sh/drivers/pci/ops-lboxre2.c

+0 −33
Original line number Diff line number Diff line
@@ -21,36 +21,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 
{

	return lboxre2_irq_tab[slot];

}
 


static struct resource sh7751_io_resource = {

	.name	= "SH7751_IO",

	.start	= SH7751_PCI_IO_BASE ,

	.end	= SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,

	.flags	= IORESOURCE_IO

};



static struct resource sh7751_mem_resource = {

	.name	= "SH7751_mem",

	.start	= SH7751_PCI_MEMORY_BASE,

	.end	= SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,

	.flags	= IORESOURCE_MEM

};



extern struct pci_ops sh7751_pci_ops;



struct pci_channel board_pci_channels[] = {

	{ sh7751_pci_init, &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },

	{ NULL, NULL, NULL, 0, 0 },

};



static struct sh4_pci_address_map sh7751_pci_map = {

	.window0	= {

		.base	= SH7751_CS3_BASE_ADDR,

		.size	= 0x04000000,

	},

};



int __init pcibios_init_platform(void)

{

	return sh7751_pcic_init(&board_pci_channels[0], &sh7751_pci_map);

}

arch/sh/drivers/pci/ops-rts7751r2d.c

+0 −34
Original line number Diff line number Diff line
@@ -29,37 +29,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 
{

	return rts7751r2d_irq_tab[slot];

}
 


static struct resource sh7751_io_resource = {

	.name	= "SH7751_IO",

	.start	= 0x4000,

	.end	= SH7751_PCI_IO_SIZE - 1,

	.flags	= IORESOURCE_IO

};



static struct resource sh7751_mem_resource = {

	.name	= "SH7751_mem",

	.start	= SH7751_PCI_MEMORY_BASE,

	.end	= SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,

	.flags	= IORESOURCE_MEM

};



extern struct pci_ops sh7751_pci_ops;



struct pci_channel board_pci_channels[] = {

	{ sh7751_pci_init, &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },

	{ NULL, NULL, NULL, 0, 0 },

};



static struct sh4_pci_address_map sh7751_pci_map = {

	.window0	= {

		.base	= SH7751_CS3_BASE_ADDR,

		.size	= 0x04000000,

	},

};



int __init pcibios_init_platform(void)

{

	return sh7751_pcic_init(&board_pci_channels[0], &sh7751_pci_map);

}