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Commit 7575a745 authored by Arseny Solokha's avatar Arseny Solokha Committed by Wolfram Sang
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i2c: mpc: fix PORDEVSR2 mask for MPC8533/44 



According to the reference manuals for the corresponding SoCs, SEC
frequency ratio configuration is indicated by bit 26 of the POR Device
Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20,
not 0x80. Testing the wrong bit leads to selection of wrong I2C clock
prescaler on those SoCs.

Signed-off-by: default avatarArseny Solokha <asolokha@kb.kras.ru>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent f6214f6f

drivers/i2c/busses/i2c-mpc.c

+6 −2
Original line number Diff line number Diff line
@@ -332,14 +332,18 @@ static u32 mpc_i2c_get_sec_cfg_8xxx(void) 
		if (prop) {

			/*

			 * Map and check POR Device Status Register 2

			 * (PORDEVSR2) at 0xE0014

			 * (PORDEVSR2) at 0xE0014. Note than while MPC8533

			 * and MPC8544 indicate SEC frequency ratio

			 * configuration as bit 26 in PORDEVSR2, other MPC8xxx

			 * parts may store it differently or may not have it

			 * at all.

			 */

			reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);

			if (!reg)

				printk(KERN_ERR

				       "Error: couldn't map PORDEVSR2\n");

			else

				val = in_be32(reg) & 0x00000080; /* sec-cfg */

				val = in_be32(reg) & 0x00000020; /* sec-cfg */

			iounmap(reg);

		}

	}