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Commit 7478c599 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "irqchip: add snapshot of msm_show_resume_irq"

parents 346ee335 fa9726fb
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+11 −0
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@@ -37,6 +37,7 @@ config ARM_GIC_V3
	select MULTI_IRQ_HANDLER
	select IRQ_DOMAIN_HIERARCHY
	select PARTITION_PERCPU
	select QCOM_SHOW_RESUME_IRQ
	select GENERIC_IRQ_EFFECTIVE_AFF_MASK

config ARM_GIC_V3_ITS
@@ -129,6 +130,16 @@ config BRCMSTB_L2_IRQ
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config QCOM_SHOW_RESUME_IRQ
	bool "Enable logging of interrupts that could have caused resume"
	depends on ARM_GIC
	default n
	help
	  This option logs wake up interrupts that have triggered just before
	  the resume loop unrolls. It helps to debug to know any unnecessary
	  wake up interrupts that causes system to come out of low power modes.
	  Say Y if you want to debug why the system resumed.

config DW_APB_ICTL
	bool
	select GENERIC_IRQ_CHIP
+1 −0
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@@ -70,6 +70,7 @@ obj-$(CONFIG_RENESAS_H8S_INTC) += irq-renesas-h8s.o
obj-$(CONFIG_ARCH_SA1100)		+= irq-sa11x0.o
obj-$(CONFIG_INGENIC_IRQ)		+= irq-ingenic.o
obj-$(CONFIG_IMX_GPCV2)			+= irq-imx-gpcv2.o
obj-$(CONFIG_QCOM_SHOW_RESUME_IRQ)      += msm_show_resume_irq.o
obj-$(CONFIG_PIC32_EVIC)		+= irq-pic32-evic.o
obj-$(CONFIG_MSCC_OCELOT_IRQ)		+= irq-mscc-ocelot.o
obj-$(CONFIG_MVEBU_GICP)		+= irq-mvebu-gicp.o
+13 −0
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// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2011, 2014-2016, 2018, The Linux Foundation. All rights reserved.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>

int msm_show_resume_irq_mask;

module_param_named(
	debug_mask, msm_show_resume_irq_mask, int, 0664);