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Commit 742c53e4 authored by David Brownell's avatar David Brownell Committed by Tony Lindgren
Browse files

ARM: OMAP: omap2/memory.c compile fixes 



Remove some conflicting declarations in omap2/memory.c so that the
file builds again.

Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent f0248408

arch/arm/mach-omap2/memory.c

+5 −35
Original line number Diff line number Diff line
@@ -30,37 +30,6 @@ 
#include "prcm-regs.h"

#include "memory.h"



#define SMS_BASE		0x68008000

#define SMS_SYSCONFIG		0x010



#define SDRC_BASE		0x68009000

#define SDRC_SYSCONFIG		0x010

#define SDRC_SYSSTATUS		0x014



static const u32 sms_base = IO_ADDRESS(SMS_BASE);

static const u32 sdrc_base = IO_ADDRESS(SDRC_BASE);





static inline void sms_write_reg(int idx, u32 val)

{

	__raw_writel(val, sms_base + idx);

}



static inline u32 sms_read_reg(int idx)

{

	return __raw_readl(sms_base + idx);

}



static inline void sdrc_write_reg(int idx, u32 val)

{

	__raw_writel(val, sdrc_base + idx);

}



static inline u32 sdrc_read_reg(int idx)

{

	return __raw_readl(sdrc_base + idx);

}





static struct memory_timings mem_timings;
@@ -132,18 +101,19 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) 
	mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8));

}



/* turn on smart idle modes for SDRAM scheduler and controller */

void __init omap2_init_memory(void)

{

	u32 l;



	l = sms_read_reg(SMS_SYSCONFIG);

	l = SMS_SYSCONFIG;

	l &= ~(0x3 << 3);

	l |= (0x2 << 3);

	sms_write_reg(SMS_SYSCONFIG, l);

	SMS_SYSCONFIG = l;



	l = sdrc_read_reg(SDRC_SYSCONFIG);

	l = SDRC_SYSCONFIG;

	l &= ~(0x3 << 3);

	l |= (0x2 << 3);

	sdrc_write_reg(SDRC_SYSCONFIG, l);

	SDRC_SYSCONFIG = l;



}