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Commit 73ae5fe8 authored by Gregory CLEMENT's avatar Gregory CLEMENT
Browse files

arm64: dts: marvell: add NAND support on the 7040-DB board 



The NAND controller used in A7K/A8K is present on the CP110 master part.
It is compatible with the pxa3xx_nand driver but requires the use of the
marvell,armada-8k-nand compatible string due to the need to first enable
the NAND controller.

Add properties to the NAND node to fit the bindings constraints of the
pxa3xx_nand driver and enable the NAND controller.

Add the 'marvell,system-controller' property to the cp110 master NAND
node with a reference to the syscon node. This is new compared to other
boards using the pxa3xx_nand driver and it is needed to be bootloader
independent and enable the NAND controller from the NAND controller
driver itself by writing in these syscon registers.

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
[miquel.raynal@free-electrons.com: add NAND ready/busy MPP subnode,
change compatible string to fit the needs of the A7k/A8k SoCs and add
the system controller property]
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@free-electrons.com>
parent 441fadad

arch/arm64/boot/dts/marvell/armada-7040-db.dts

+30 −0
Original line number Diff line number Diff line
@@ -146,6 +146,36 @@ 
	};

};



&cpm_nand {

	/*

	 * SPI on CPM and NAND have common pins on this board. We can

	 * use only one at a time. To enable the NAND (whihch will

	 * disable the SPI), the "status = "okay";" line have to be

	 * added here.

	 */

	num-cs = <1>;

	pinctrl-0 = <&nand_pins>, <&nand_rb>;

	pinctrl-names = "default";

	nand-ecc-strength = <4>;

	nand-ecc-step-size = <512>;

	marvell,nand-enable-arbiter;

	nand-on-flash-bbt;



	partition@0 {

		label = "U-Boot";

		reg = <0 0x200000>;

	};

	partition@200000 {

		label = "Linux";

		reg = <0x200000 0xe00000>;

	};

	partition@1000000 {

		label = "Filesystem";

		reg = <0x1000000 0x3f000000>;

	};

};





&cpm_spi1 {

	status = "okay";

arch/arm64/boot/dts/marvell/armada-70x0.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -64,5 +64,19 @@ 
&cpm_syscon0 {

	cpm_pinctrl: pinctrl {

		compatible = "marvell,armada-7k-pinctrl";



		nand_pins: nand-pins {

			marvell,pins =

			"mpp15", "mpp16", "mpp17", "mpp18",

			"mpp19", "mpp20", "mpp21", "mpp22",

			"mpp23", "mpp24", "mpp25", "mpp26",

			"mpp27";

			marvell,function = "dev";

		};



		nand_rb: nand-rb {

			marvell,pins = "mpp13";

			marvell,function = "nf";

		};

	};

};

arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi

+3 −1
Original line number Diff line number Diff line
@@ -315,12 +315,14 @@ 
				 * this controller is only usable on the CPM

				 * for A7K and on the CPS for A8K.

				 */

				compatible = "marvell,armada370-nand";

				compatible = "marvell,armada-8k-nand",

					     "marvell,armada370-nand";

				reg = <0x720000 0x54>;

				#address-cells = <1>;

				#size-cells = <1>;

				interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&cpm_clk 1 2>;

				marvell,system-controller = <&cpm_syscon0>;

				status = "disabled";

			};

arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -316,7 +316,8 @@ 
				 * this controller is only usable on the CPM

				 * for A7K and on the CPS for A8K.

				 */

				compatible = "marvell,armada370-nand";

				compatible = "marvell,armada370-nand",

					     "marvell,armada370-nand";

				reg = <0x720000 0x54>;

				#address-cells = <1>;

				#size-cells = <1>;