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Commit 736c9ba2 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-enhancements'



Jiri Pirko says:

====================
mlxsw: couple of enhancements and fixes

Couple of enhancements and fixes from Ido.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 67ea7ef1 523779c7
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+2 −1
Original line number Diff line number Diff line
@@ -1157,6 +1157,7 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
	if (mlxsw_core->driver->fini)
		mlxsw_core->driver->fini(mlxsw_core);
err_driver_init:
	mlxsw_thermal_fini(mlxsw_core->thermal);
err_thermal_init:
err_hwmon_init:
	devlink_unregister(devlink);
@@ -1187,8 +1188,8 @@ void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core)
	mlxsw_thermal_fini(mlxsw_core->thermal);
	devlink_unregister(devlink);
	mlxsw_emad_fini(mlxsw_core);
	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
	kfree(mlxsw_core->lag.mapping);
	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
	free_percpu(mlxsw_core->pcpu_stats);
	devlink_free(devlink);
	mlxsw_core_driver_put(device_kind);
+2 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ enum mlxsw_res_id {
	MLXSW_RES_ID_MAX_SYSTEM_PORT,
	MLXSW_RES_ID_MAX_LAG,
	MLXSW_RES_ID_MAX_LAG_MEMBERS,
	MLXSW_RES_ID_MAX_BUFFER_SIZE,
	MLXSW_RES_ID_MAX_CPU_POLICERS,
	MLXSW_RES_ID_MAX_VRS,
	MLXSW_RES_ID_MAX_RIFS,
@@ -70,6 +71,7 @@ static u16 mlxsw_res_ids[] = {
	[MLXSW_RES_ID_MAX_SYSTEM_PORT] = 0x2502,
	[MLXSW_RES_ID_MAX_LAG] = 0x2520,
	[MLXSW_RES_ID_MAX_LAG_MEMBERS] = 0x2521,
	[MLXSW_RES_ID_MAX_BUFFER_SIZE] = 0x2802,	/* Bytes */
	[MLXSW_RES_ID_MAX_CPU_POLICERS] = 0x2A13,
	[MLXSW_RES_ID_MAX_VRS] = 0x2C01,
	[MLXSW_RES_ID_MAX_RIFS] = 0x2C02,
+3 −0
Original line number Diff line number Diff line
@@ -611,6 +611,9 @@ int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
	u32 pool_size = MLXSW_SP_BYTES_TO_CELLS(size);
	enum mlxsw_reg_sbpr_mode mode;

	if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE))
		return -EINVAL;

	mode = (enum mlxsw_reg_sbpr_mode) threshold_type;
	return mlxsw_sp_sb_pr_write(mlxsw_sp, pool, dir, mode, pool_size);
}