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Commit 72f61d2e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu into next/dt

Pull "mvebu dt for 4.9 (part 1)" from Gregory CLEMENT:

- update for Armada XP/38x allowing using direct access SPI
- various improvement for Armada 39x platforms
- add pinctrl information for NANd on Armada 38x
- fix the kirkwood based Openblock A6 external GPIO pins

* tag 'mvebu-dt-4.9-1' of git://git.infradead.org/linux-mvebu:
  ARM: dts: mvebu: fix reference to a390 spi controller
  ARM: dts: armada-38x: Add NAND pinctrl information
  ARM: dts: kirkwood: Fix Openblock A6 external GPIO pins
  ARM: dts: mvebu: armada-395-gp: add support for the Armada 395 GP Board
  ARM: dts: mvebu: armada-390-db: add support for the Armada 390 DB board
  ARM: dts: mvebu: armada-398-db: enable supported usb interfaces
  ARM: dts: mvebu: armada-398: update the dtsi about missing interfaces
  ARM: dts: mvebu: armada-395: add support for the Armada 395 SoC family
  ARM: dts: mvebu: armada-39x: enable rtc for all Armada-39x SoCs
  ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's
  ARM: dts: mvebu: armada-39x: enable watchdog for all Armada-39x SoCs
  ARM: dts: mvebu: armada-39x: enable the thermal sensor in Armada-39x SoCs
  ARM: dts: mvebu: armada-39x: enable PMU, CA9 SoC Controller and Coherency fabric
  ARM: dts: mvebu: armada-39x: update the SDHCI node on Armada 39x
  ARM: dts: mvebu: armada-390: add missing compatibility string and bracket
  ARM: dts: mvebu: a385-db-ap: add default partition description for NAND
  ARM: dts: mvebu: a385-db-ap: enable USB (orion-ehci) port
  ARM: dts: mvebu: armada-370-xp: Add MBus mappings for all SPI devices
  ARM: dts: mvebu: A37x/XP/38x/39x: Move SPI controller nodes into 'soc' node
  ARM: dts: mvebu: Add SPI1 pinctrl defines for Armada XP
parents 9992f213 a305cc2f
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+13 −2
Original line number Diff line number Diff line
@@ -8,8 +8,19 @@ Required root node property:

 - compatible: must contain "marvell,armada390"

In addition, boards using the Marvell Armada 398 SoC shall have the
following property before the previous one:
In addition, boards using the Marvell Armada 395 SoC shall have the
following property before the common "marvell,armada390" one:

Required root node property:

compatible: must contain "marvell,armada395"

Example:

compatible = "marvell,a395-gp", "marvell,armada395", "marvell,armada390";

Boards using the Marvell Armada 398 SoC shall have the following
property before the common "marvell,armada390" one:

Required root node property:

+15 −14
Original line number Diff line number Diff line
@@ -155,20 +155,6 @@
				status = "okay";
			};

			spi0: spi@10600 {
				pinctrl-0 = <&spi0_pins2>;
				pinctrl-names = "default";
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "mx25l25635e", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <50000000>;
				};
			};

			nand@d0000 {
				status = "okay";
				num-cs = <1>;
@@ -274,3 +260,18 @@
		compatible = "linux,spdif-dir";
	};
};

&spi0 {
	pinctrl-0 = <&spi0_pins2>;
	pinctrl-names = "default";
	status = "okay";

	spi-flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "mx25l25635e", "jedec,spi-nor";
		reg = <0>; /* Chip select 0 */
		spi-max-frequency = <50000000>;
	};
};
+20 −20
Original line number Diff line number Diff line
@@ -68,26 +68,6 @@
				phy-mode = "rgmii-id";
			};

			spi@10600 {
				status = "okay";
				pinctrl-0 = <&spi0_pins2>;
				pinctrl-names = "default";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					/* MX25L8006E */
					compatible = "mxicy,mx25l8005", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <50000000>;

					partition@0 {
						label = "u-boot";
						reg = <0x0 0x100000>;
					};
				};
			};

			usb@50000 {
				status = "okay";
			};
@@ -176,3 +156,23 @@
		marvell,function = "gpio";
	};
};

&spi0 {
	status = "okay";
	pinctrl-0 = <&spi0_pins2>;
	pinctrl-names = "default";

	spi-flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		/* MX25L8006E */
		compatible = "mxicy,mx25l8005", "jedec,spi-nor";
		reg = <0>; /* Chip select 0 */
		spi-max-frequency = <50000000>;

		partition@0 {
			label = "u-boot";
			reg = <0x0 0x100000>;
		};
	};
};
+56 −56
Original line number Diff line number Diff line
@@ -87,62 +87,6 @@
				status = "disabled";
			};

			spi0: spi@10600 {
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "micron,n25q064", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <20000000>;

					/*
					 * Warning!
					 *
					 * Synology u-boot uses its compiled-in environment
					 * and it seems Synology did not care to change u-boot
					 * default configuration in order to allow saving a
					 * modified environment at a sensible location. So,
					 * if you do a 'saveenv' under u-boot, your modified
					 * environment will be saved at 1MB after the start
					 * of the flash, i.e. in the middle of the uImage.
					 * For that reason, it is strongly advised not to
					 * change the default environment, unless you know
					 * what you are doing.
					 */
					partition@00000000 { /* u-boot */
						label = "RedBoot";
						reg = <0x00000000 0x000c0000>; /* 768KB */
					};

					partition@000c0000 { /* uImage */
						label = "zImage";
						reg = <0x000c0000 0x002d0000>; /* 2880KB */
					};

					partition@00390000 { /* uInitramfs */
						label = "rd.gz";
						reg = <0x00390000 0x00440000>; /* 4250KB */
					};

					partition@007d0000 { /* MAC address and serial number */
						label = "vendor";
						reg = <0x007d0000 0x00010000>; /* 64KB */
					};

					partition@007e0000 {
						label = "RedBoot config";
						reg = <0x007e0000 0x00010000>; /* 64KB */
					};

					partition@007f0000 {
						label = "FIS directory";
						reg = <0x007f0000 0x00010000>; /* 64KB */
					};
				};
			};

			i2c@11000 {
				compatible = "marvell,mv64xxx-i2c";
				pinctrl-0 = <&i2c0_pins>;
@@ -347,3 +291,59 @@
		marvell,function = "gpio";
	};
};

&spi0 {
	status = "okay";

	spi-flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,n25q064", "jedec,spi-nor";
		reg = <0>; /* Chip select 0 */
		spi-max-frequency = <20000000>;

		/*
		 * Warning!
		 *
		 * Synology u-boot uses its compiled-in environment
		 * and it seems Synology did not care to change u-boot
		 * default configuration in order to allow saving a
		 * modified environment at a sensible location. So,
		 * if you do a 'saveenv' under u-boot, your modified
		 * environment will be saved at 1MB after the start
		 * of the flash, i.e. in the middle of the uImage.
		 * For that reason, it is strongly advised not to
		 * change the default environment, unless you know
		 * what you are doing.
		 */
		partition@00000000 { /* u-boot */
			label = "RedBoot";
			reg = <0x00000000 0x000c0000>; /* 768KB */
		};

		partition@000c0000 { /* uImage */
			label = "zImage";
			reg = <0x000c0000 0x002d0000>; /* 2880KB */
		};

		partition@00390000 { /* uInitramfs */
			label = "rd.gz";
			reg = <0x00390000 0x00440000>; /* 4250KB */
		};

		partition@007d0000 { /* MAC address and serial number */
			label = "vendor";
			reg = <0x007d0000 0x00010000>; /* 64KB */
		};

		partition@007e0000 {
			label = "RedBoot config";
			reg = <0x007e0000 0x00010000>; /* 64KB */
		};

		partition@007f0000 {
			label = "FIS directory";
			reg = <0x007f0000 0x00010000>; /* 64KB */
		};
	};
};
+36 −20
Original line number Diff line number Diff line
@@ -148,26 +148,6 @@
				interrupts = <50>;
			};

			spi0: spi@10600 {
				reg = <0x10600 0x28>;
				#address-cells = <1>;
				#size-cells = <0>;
				cell-index = <0>;
				interrupts = <30>;
				clocks = <&coreclk 0>;
				status = "disabled";
			};

			spi1: spi@10680 {
				reg = <0x10680 0x28>;
				#address-cells = <1>;
				#size-cells = <0>;
				cell-index = <1>;
				interrupts = <92>;
				clocks = <&coreclk 0>;
				status = "disabled";
			};

			i2c0: i2c@11000 {
				compatible = "marvell,mv64xxx-i2c";
				#address-cells = <1>;
@@ -320,6 +300,42 @@
				status = "disabled";
			};
		};

		spi0: spi@10600 {
			reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */
			      <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
			      <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
			      <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */
			      <MBUS_ID(0x01, 0xde) 0 0xffffffff>, /* CS3 */
			      <MBUS_ID(0x01, 0x1f) 0 0xffffffff>, /* CS4 */
			      <MBUS_ID(0x01, 0x5f) 0 0xffffffff>, /* CS5 */
			      <MBUS_ID(0x01, 0x9f) 0 0xffffffff>, /* CS6 */
			      <MBUS_ID(0x01, 0xdf) 0 0xffffffff>; /* CS7 */
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			interrupts = <30>;
			clocks = <&coreclk 0>;
			status = "disabled";
		};

		spi1: spi@10680 {
			reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x28>, /* control */
			      <MBUS_ID(0x01, 0x1a) 0 0xffffffff>, /* CS0 */
			      <MBUS_ID(0x01, 0x5a) 0 0xffffffff>, /* CS1 */
			      <MBUS_ID(0x01, 0x9a) 0 0xffffffff>, /* CS2 */
			      <MBUS_ID(0x01, 0xda) 0 0xffffffff>, /* CS3 */
			      <MBUS_ID(0x01, 0x1b) 0 0xffffffff>, /* CS4 */
			      <MBUS_ID(0x01, 0x5b) 0 0xffffffff>, /* CS5 */
			      <MBUS_ID(0x01, 0x9b) 0 0xffffffff>, /* CS6 */
			      <MBUS_ID(0x01, 0xdb) 0 0xffffffff>; /* CS7 */
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			interrupts = <92>;
			clocks = <&coreclk 0>;
			status = "disabled";
		};
	};

	clocks {
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