Loading arch/arm64/boot/dts/qcom/kona-coresight.dtsi +5 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */ &soc { Loading Loading @@ -1938,6 +1938,10 @@ clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; qcom,cti-gpio-trigout = <4>; pinctrl-names = "cti-trigout-pctrl"; pinctrl-0 = <&trigout_a>; }; cti3: cti@6013000 { Loading arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi +14 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */ &soc { Loading @@ -13,6 +13,19 @@ interrupt-controller; #interrupt-cells = <2>; trigout_a: trigout_a { mux { pins = "gpio2"; function = "qdss_cti"; }; config { pins = "gpio2"; drive-strength = <2>; bias-disable; }; }; qupv3_se2_2uart_pins: qupv3_se2_2uart_pins { qupv3_se2_2uart_active: qupv3_se2_2uart_active { mux { Loading Loading
arch/arm64/boot/dts/qcom/kona-coresight.dtsi +5 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */ &soc { Loading Loading @@ -1938,6 +1938,10 @@ clocks = <&clock_aop QDSS_CLK>; clock-names = "apb_pclk"; qcom,cti-gpio-trigout = <4>; pinctrl-names = "cti-trigout-pctrl"; pinctrl-0 = <&trigout_a>; }; cti3: cti@6013000 { Loading
arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi +14 −1 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. */ &soc { Loading @@ -13,6 +13,19 @@ interrupt-controller; #interrupt-cells = <2>; trigout_a: trigout_a { mux { pins = "gpio2"; function = "qdss_cti"; }; config { pins = "gpio2"; drive-strength = <2>; bias-disable; }; }; qupv3_se2_2uart_pins: qupv3_se2_2uart_pins { qupv3_se2_2uart_active: qupv3_se2_2uart_active { mux { Loading