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Commit 71ec319d authored by Jilai Wang's avatar Jilai Wang
Browse files

msm: npu: Remove BW monitor related code



It's not needed to access BWMON APIs and registers from NPU driver
in Kona. This change is to remove all related codes.

Change-Id: Idadab55bb9055691cedaa412857fac117b7e9ed3
Signed-off-by: default avatarJilai Wang <jilaiw@codeaurora.org>
parent 0309d5f4
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+0 −2
Original line number Diff line number Diff line
@@ -159,7 +159,6 @@ struct npu_pwrctrl {
	uint32_t num_pwrlevels;

	struct device *devbw;
	uint32_t bwmon_enabled;
	uint32_t uc_pwrlevel;
	uint32_t cdsprm_pwrlevel;
	uint32_t fmax_pwrlevel;
@@ -206,7 +205,6 @@ struct npu_device {
	struct npu_io_data tcm_io;
	struct npu_io_data qdsp_io;
	struct npu_io_data apss_shared_io;
	struct npu_io_data bwmon_io;
	struct npu_io_data qfprom_io;

	uint32_t core_clk_num;
+0 −40
Original line number Diff line number Diff line
@@ -1474,8 +1474,6 @@ static int npu_pwrctrl_init(struct npu_device *npu_dev)
	struct platform_device *pdev = npu_dev->pdev;
	struct device_node *node;
	int ret = 0;
	struct platform_device *p2dev;
	struct npu_pwrctrl *pwr = &npu_dev->pwrctrl;

	/* Power levels */
	node = of_find_node_by_name(pdev->dev.of_node, "qcom,npu-pwrlevels");
@@ -1489,26 +1487,6 @@ static int npu_pwrctrl_init(struct npu_device *npu_dev)
	if (ret)
		return ret;

	/* Parse Bandwidth */
	node = of_parse_phandle(pdev->dev.of_node,
				"qcom,npubw-dev", 0);

	if (node) {
		/* Set to 1 initially - we assume bwmon is on */
		pwr->bwmon_enabled = 1;
		p2dev = of_find_device_by_node(node);
		if (p2dev) {
			pwr->devbw = &p2dev->dev;
		} else {
			pr_err("parser power level failed\n");
			ret = -EINVAL;
			return ret;
		}
	} else {
		pr_warn("bwdev is not defined in dts\n");
		pwr->devbw = NULL;
	}

	return ret;
}

@@ -1682,24 +1660,6 @@ static int npu_probe(struct platform_device *pdev)
	pr_debug("apss_shared phy address=0x%llx virt=%pK\n",
		res->start, npu_dev->apss_shared_io.base);

	res = platform_get_resource_byname(pdev,
		IORESOURCE_MEM, "bwmon");
	if (!res) {
		pr_info("unable to get bwmon resource\n");
	} else {
		npu_dev->bwmon_io.size = resource_size(res);
		npu_dev->bwmon_io.phy_addr = res->start;
		npu_dev->bwmon_io.base = devm_ioremap(&pdev->dev, res->start,
						npu_dev->bwmon_io.size);
		if (unlikely(!npu_dev->bwmon_io.base)) {
			pr_err("unable to map bwmon\n");
			rc = -ENOMEM;
			goto error_get_dev_num;
		}
		pr_debug("bwmon phy address=0x%llx virt=%pK\n",
			res->start, npu_dev->bwmon_io.base);
	}

	res = platform_get_resource_byname(pdev,
		IORESOURCE_MEM, "qfprom_physical");
	if (!res) {
+0 −7
Original line number Diff line number Diff line
@@ -47,13 +47,6 @@
#define NPU_GPR14 (0x00000138)
#define NPU_GPR15 (0x0000013C)

#define BWMON2_SAMPLING_WINDOW (0x000003A8)
#define BWMON2_BYTE_COUNT_THRESHOLD_HIGH (0x000003AC)
#define BWMON2_BYTE_COUNT_THRESHOLD_MEDIUM (0x000003B0)
#define BWMON2_BYTE_COUNT_THRESHOLD_LOW (0x000003B4)
#define BWMON2_ZONE_ACTIONS (0x000003B8)
#define BWMON2_ZONE_COUNT_THRESHOLD (0x000003BC)

#define NPU_QDSP6SS_IPC 0x00088000
#define NPU_QDSP6SS_IPC1 0x00088004

+0 −15
Original line number Diff line number Diff line
@@ -65,21 +65,6 @@ void npu_apss_shared_reg_write(struct npu_device *npu_dev, uint32_t off,
	__iowmb();
}

uint32_t npu_bwmon_reg_read(struct npu_device *npu_dev, uint32_t off)
{
	uint32_t ret = 0;

	ret = readl(npu_dev->bwmon_io.base + off);
	return ret;
}

void npu_bwmon_reg_write(struct npu_device *npu_dev, uint32_t off,
	uint32_t val)
{
	writel_relaxed(val, npu_dev->bwmon_io.base + off);
	__iowmb();
}

uint32_t npu_qfprom_reg_read(struct npu_device *npu_dev, uint32_t off)
{
	uint32_t ret = 0;
+0 −3
Original line number Diff line number Diff line
@@ -56,9 +56,6 @@ void npu_qdsp_reg_write(struct npu_device *npu_dev, uint32_t off, uint32_t val);
uint32_t npu_apss_shared_reg_read(struct npu_device *npu_dev, uint32_t off);
void npu_apss_shared_reg_write(struct npu_device *npu_dev, uint32_t off,
	uint32_t val);
uint32_t npu_bwmon_reg_read(struct npu_device *npu_dev, uint32_t off);
void npu_bwmon_reg_write(struct npu_device *npu_dev, uint32_t off,
	uint32_t val);
void npu_mem_write(struct npu_device *npu_dev, void *dst, void *src,
	uint32_t size);
int32_t npu_mem_read(struct npu_device *npu_dev, void *src, void *dst,