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Commit 71db3948 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
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ARM: dts: imx6/7: Remove unit-address from anatop regulators 



Remove unit-address and reg property from anatop regulators to fix
the following DTC warnings with W=1:

arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)
arch/arm/boot/dts/imx6dl-apf6dev.dtb: Warning (unique_unit_address): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpu@20c8140: duplicate unit-address (also used in node /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc@20c8140)

Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1f31e253

arch/arm/boot/dts/imx6qdl.dtsi

+6 −14
Original line number Diff line number Diff line
@@ -685,11 +685,8 @@ 
				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,

					     <0 54 IRQ_TYPE_LEVEL_HIGH>,

					     <0 127 IRQ_TYPE_LEVEL_HIGH>;

				#address-cells = <1>;

				#size-cells = <0>;



				regulator-1p1@20c8110 {

					reg = <0x20c8110>;

				regulator-1p1 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd1p1";

					regulator-min-microvolt = <1000000>;
@@ -704,8 +701,7 @@ 
					anatop-enable-bit = <0>;

				};



				regulator-3p0@20c8120 {

					reg = <0x20c8120>;

				regulator-3p0 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd3p0";

					regulator-min-microvolt = <2800000>;
@@ -720,8 +716,7 @@ 
					anatop-enable-bit = <0>;

				};



				regulator-2p5@20c8130 {

					reg = <0x20c8130>;

				regulator-2p5 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd2p5";

					regulator-min-microvolt = <2250000>;
@@ -736,8 +731,7 @@ 
					anatop-enable-bit = <0>;

				};



				reg_arm: regulator-vddcore@20c8140 {

					reg = <0x20c8140>;

				reg_arm: regulator-vddcore {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddarm";

					regulator-min-microvolt = <725000>;
@@ -754,8 +748,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_pu: regulator-vddpu@20c8140 {

					reg = <0x20c8140>;

				reg_pu: regulator-vddpu {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddpu";

					regulator-min-microvolt = <725000>;
@@ -772,8 +765,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_soc: regulator-vddsoc@20c8140 {

					reg = <0x20c8140>;

				reg_soc: regulator-vddsoc {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddsoc";

					regulator-min-microvolt = <725000>;

arch/arm/boot/dts/imx6sl.dtsi

+6 −14
Original line number Diff line number Diff line
@@ -519,11 +519,8 @@ 
				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,

					     <0 54 IRQ_TYPE_LEVEL_HIGH>,

					     <0 127 IRQ_TYPE_LEVEL_HIGH>;

				#address-cells = <1>;

				#size-cells = <0>;



				regulator-1p1@20c8110 {

					reg = <0x20c8110>;

				regulator-1p1 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd1p1";

					regulator-min-microvolt = <800000>;
@@ -538,8 +535,7 @@ 
					anatop-enable-bit = <0>;

				};



				regulator-3p0@20c8120 {

					reg = <0x20c8120>;

				regulator-3p0 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd3p0";

					regulator-min-microvolt = <2800000>;
@@ -554,8 +550,7 @@ 
					anatop-enable-bit = <0>;

				};



				regulator-2p5@20c8130 {

					reg = <0x20c8130>;

				regulator-2p5 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd2p5";

					regulator-min-microvolt = <2100000>;
@@ -570,8 +565,7 @@ 
					anatop-enable-bit = <0>;

				};



				reg_arm: regulator-vddcore@20c8140 {

					reg = <0x20c8140>;

				reg_arm: regulator-vddcore {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddarm";

					regulator-min-microvolt = <725000>;
@@ -588,8 +582,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_pu: regulator-vddpu@20c8140 {

					reg = <0x20c8140>;

				reg_pu: regulator-vddpu {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddpu";

					regulator-min-microvolt = <725000>;
@@ -606,8 +599,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_soc: regulator-vddsoc@20c8140 {

					reg = <0x20c8140>;

				reg_soc: regulator-vddsoc {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddsoc";

					regulator-min-microvolt = <725000>;

arch/arm/boot/dts/imx6sx.dtsi

+6 −14
Original line number Diff line number Diff line
@@ -587,11 +587,8 @@ 
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

				#address-cells = <1>;

				#size-cells = <0>;



				regulator-1p1@20c8110 {

					reg = <0x20c8110>;

				regulator-1p1 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd1p1";

					regulator-min-microvolt = <800000>;
@@ -606,8 +603,7 @@ 
					anatop-enable-bit = <0>;

				};



				regulator-3p0@20c8120 {

					reg = <0x20c8120>;

				regulator-3p0 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd3p0";

					regulator-min-microvolt = <2800000>;
@@ -622,8 +618,7 @@ 
					anatop-enable-bit = <0>;

				};



				regulator-2p5@20c8130 {

					reg = <0x20c8130>;

				regulator-2p5 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd2p5";

					regulator-min-microvolt = <2100000>;
@@ -638,8 +633,7 @@ 
					anatop-enable-bit = <0>;

				};



				reg_arm: regulator-vddcore@20c8140 {

					reg = <0x20c8140>;

				reg_arm: regulator-vddcore {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddarm";

					regulator-min-microvolt = <725000>;
@@ -656,8 +650,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_pcie: regulator-vddpcie@20c8140 {

					reg = <0x20c8140>;

				reg_pcie: regulator-vddpcie {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddpcie";

					regulator-min-microvolt = <725000>;
@@ -673,8 +666,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_soc: regulator-vddsoc@20c8140 {

					reg = <0x20c8140>;

				reg_soc: regulator-vddsoc {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddsoc";

					regulator-min-microvolt = <725000>;

arch/arm/boot/dts/imx6ul.dtsi

+3 −8
Original line number Diff line number Diff line
@@ -547,11 +547,8 @@ 
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,

					     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

				#address-cells = <1>;

				#size-cells = <0>;



				reg_3p0: regulator-3p0@20c8110 {

					reg = <0x20c8110>;

				reg_3p0: regulator-3p0 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd3p0";

					regulator-min-microvolt = <2625000>;
@@ -565,8 +562,7 @@ 
					anatop-enable-bit = <0>;

				};



				reg_arm: regulator-vddcore@20c8140 {

					reg = <0x20c8140>;

				reg_arm: regulator-vddcore {

					compatible = "fsl,anatop-regulator";

					regulator-name = "cpu";

					regulator-min-microvolt = <725000>;
@@ -583,8 +579,7 @@ 
					anatop-max-voltage = <1450000>;

				};



				reg_soc: regulator-vddsoc@20c8140 {

					reg = <0x20c8140>;

				reg_soc: regulator-vddsoc {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vddsoc";

					regulator-min-microvolt = <725000>;

arch/arm/boot/dts/imx7s.dtsi

+2 −6
Original line number Diff line number Diff line
@@ -519,11 +519,8 @@ 
				reg = <0x30360000 0x10000>;

				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;

				#address-cells = <1>;

				#size-cells = <0>;



				reg_1p0d: regulator-vdd1p0d@30360210 {

					reg = <0x30360210>;

				reg_1p0d: regulator-vdd1p0d {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd1p0d";

					regulator-min-microvolt = <800000>;
@@ -537,8 +534,7 @@ 
					anatop-enable-bit = <0>;

				};



				reg_1p2: regulator-vdd1p2@30360220 {

					reg = <0x30360220>;

				reg_1p2: regulator-vdd1p2 {

					compatible = "fsl,anatop-regulator";

					regulator-name = "vdd1p2";

					regulator-min-microvolt = <1100000>;