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Commit 719f56f2 authored by Manjunath Hadli's avatar Manjunath Hadli Committed by Sekhar Nori
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ARM: davinci: dm365: move private definitions to C file 



Move register base addresses and offsets used only in dm365.c
from arch/arm/mach-davinci/include/mach/dm365.h in to the C
file as these definitions are used only in C file.

This helps reduce code in arch/arm/mach-davinci/include/mach/
which is not really needed by rest of the kernel.

Signed-off-by: default avatarManjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent 887b8a93

arch/arm/mach-davinci/dm365.c

+16 −0
Original line number Diff line number Diff line
@@ -40,6 +40,22 @@ 


#define DM365_REF_FREQ		24000000	/* 24 MHz on the DM365 EVM */



/* Base of key scan register bank */

#define DM365_KEYSCAN_BASE		0x01c69400



#define DM365_RTC_BASE			0x01c69000



#define DAVINCI_DM365_VC_BASE		0x01d0c000

#define DAVINCI_DMA_VC_TX		2

#define DAVINCI_DMA_VC_RX		3



#define DM365_EMAC_BASE			0x01d07000

#define DM365_EMAC_MDIO_BASE		(DM365_EMAC_BASE + 0x4000)

#define DM365_EMAC_CNTRL_OFFSET		0x0000

#define DM365_EMAC_CNTRL_MOD_OFFSET	0x3000

#define DM365_EMAC_CNTRL_RAM_OFFSET	0x1000

#define DM365_EMAC_CNTRL_RAM_SIZE	0x2000



static struct pll_data pll1_data = {

	.num		= 1,

	.phys_base	= DAVINCI_PLL1_BASE,

arch/arm/mach-davinci/include/mach/dm365.h

+0 −16
Original line number Diff line number Diff line
@@ -20,22 +20,6 @@ 
#include <mach/keyscan.h>

#include <media/davinci/vpfe_capture.h>



#define DM365_EMAC_BASE			(0x01D07000)

#define DM365_EMAC_MDIO_BASE		(DM365_EMAC_BASE + 0x4000)

#define DM365_EMAC_CNTRL_OFFSET		(0x0000)

#define DM365_EMAC_CNTRL_MOD_OFFSET	(0x3000)

#define DM365_EMAC_CNTRL_RAM_OFFSET	(0x1000)

#define DM365_EMAC_CNTRL_RAM_SIZE	(0x2000)



/* Base of key scan register bank */

#define DM365_KEYSCAN_BASE		(0x01C69400)



#define DM365_RTC_BASE			(0x01C69000)



#define DAVINCI_DM365_VC_BASE		(0x01D0C000)

#define DAVINCI_DMA_VC_TX		2

#define DAVINCI_DMA_VC_RX		3



#define DM365_ASYNC_EMIF_CONTROL_BASE	0x01D10000

#define DM365_ASYNC_EMIF_DATA_CE0_BASE	0x02000000

#define DM365_ASYNC_EMIF_DATA_CE1_BASE	0x04000000