Loading arch/powerpc/platforms/iseries/exception.S +8 −7 Original line number Diff line number Diff line Loading @@ -30,9 +30,10 @@ #include <asm/asm-offsets.h> #include <asm/thread_info.h> #include <asm/ptrace.h> #include <asm/exception.h> #include <asm/cputable.h> #include "exception.h" .text .globl system_reset_iSeries Loading Loading @@ -104,15 +105,15 @@ BEGIN_FTR_SECTION mtcrf 0x80,r12 mfspr r12,SPRN_SPRG2 END_FTR_SECTION_IFCLR(CPU_FTR_SLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN) EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_1(PACA_EXGEN) EXCEPTION_PROLOG_ISERIES_1 b data_access_common .do_stab_bolted_iSeries: mtcrf 0x80,r12 mfspr r12,SPRN_SPRG2 EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1 b .do_stab_bolted .globl data_access_slb_iSeries Loading Loading @@ -171,7 +172,7 @@ slb_miss_user_iseries: std r10,PACA_EXGEN+EX_R13(r13) std r11,PACA_EXGEN+EX_R9(r13) std r12,PACA_EXGEN+EX_R3(r13) EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_1 b slb_miss_user_common #endif Loading @@ -187,7 +188,7 @@ slb_miss_user_iseries: system_call_iSeries: mr r9,r13 mfspr r13,SPRN_SPRG3 EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_1 b system_call_common STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN) Loading arch/powerpc/platforms/iseries/exception.h 0 → 100644 +58 −0 Original line number Diff line number Diff line #ifndef _ASM_POWERPC_ISERIES_EXCEPTION_H #define _ASM_POWERPC_ISERIES_EXCEPTION_H /* * Extracted from head_64.S * * PowerPC version * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> * Adapted for Power Macintosh by Paul Mackerras. * Low-level exception handlers and MMU support * rewritten by Paul Mackerras. * Copyright (C) 1996 Paul Mackerras. * * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com * * This file contains the low-level support and setup for the * PowerPC-64 platform, including trap and interrupt dispatch. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <asm/exception.h> #define EXCEPTION_PROLOG_ISERIES_1 \ mfmsr r10; \ ld r12,PACALPPACAPTR(r13); \ ld r11,LPPACASRR0(r12); \ ld r12,LPPACASRR1(r12); \ ori r10,r10,MSR_RI; \ mtmsrd r10,1 #define STD_EXCEPTION_ISERIES(n, label, area) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_1(area); \ EXCEPTION_PROLOG_ISERIES_1; \ b label##_common #define MASKABLE_EXCEPTION_ISERIES(n, label) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_1(PACA_EXGEN); \ lbz r10,PACASOFTIRQEN(r13); \ cmpwi 0,r10,0; \ beq- label##_iSeries_masked; \ EXCEPTION_PROLOG_ISERIES_1; \ b label##_common; \ #endif /* _ASM_POWERPC_ISERIES_EXCEPTION_H */ include/asm-powerpc/exception.h +12 −59 Original line number Diff line number Diff line Loading @@ -62,6 +62,16 @@ ori reg,reg,(label)@l; /* virt addr of handler ... */ #endif #define EXCEPTION_PROLOG_1(area) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9 /* * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode. * The firmware calls the registered system_reset_fwnmi and Loading @@ -70,14 +80,7 @@ * This firmware bug is present on POWER4 and JS20. */ #define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9; \ EXCEPTION_PROLOG_1(area); \ clrrdi r12,r13,32; /* get high part of &label */ \ mfmsr r10; \ /* force 64bit mode */ \ Loading @@ -94,14 +97,7 @@ b . /* prevent speculative execution */ #define EXCEPTION_PROLOG_PSERIES(area, label) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9; \ EXCEPTION_PROLOG_1(area); \ clrrdi r12,r13,32; /* get high part of &label */ \ mfmsr r10; \ mfspr r11,SPRN_SRR0; /* save SRR0 */ \ Loading @@ -113,28 +109,6 @@ rfid; \ b . /* prevent speculative execution */ /* * This is the start of the interrupt handlers for iSeries * This code runs with relocation on. */ #define EXCEPTION_PROLOG_ISERIES_1(area) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9 #define EXCEPTION_PROLOG_ISERIES_2 \ mfmsr r10; \ ld r12,PACALPPACAPTR(r13); \ ld r11,LPPACASRR0(r12); \ ld r12,LPPACASRR1(r12); \ ori r10,r10,MSR_RI; \ mtmsrd r10,1 /* * The common exception prolog is used for all except a few exceptions * such as a segment miss on a kernel address. We have to be prepared Loading Loading @@ -247,27 +221,6 @@ label##_pSeries: \ rfid; \ b . /* prevent speculative execution */ #define STD_EXCEPTION_ISERIES(n, label, area) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_ISERIES_1(area); \ EXCEPTION_PROLOG_ISERIES_2; \ b label##_common #define MASKABLE_EXCEPTION_ISERIES(n, label) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \ lbz r10,PACASOFTIRQEN(r13); \ cmpwi 0,r10,0; \ beq- label##_iSeries_masked; \ EXCEPTION_PROLOG_ISERIES_2; \ b label##_common; \ #ifdef CONFIG_PPC_ISERIES #define DISABLE_INTS \ li r11,0; \ Loading Loading
arch/powerpc/platforms/iseries/exception.S +8 −7 Original line number Diff line number Diff line Loading @@ -30,9 +30,10 @@ #include <asm/asm-offsets.h> #include <asm/thread_info.h> #include <asm/ptrace.h> #include <asm/exception.h> #include <asm/cputable.h> #include "exception.h" .text .globl system_reset_iSeries Loading Loading @@ -104,15 +105,15 @@ BEGIN_FTR_SECTION mtcrf 0x80,r12 mfspr r12,SPRN_SPRG2 END_FTR_SECTION_IFCLR(CPU_FTR_SLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN) EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_1(PACA_EXGEN) EXCEPTION_PROLOG_ISERIES_1 b data_access_common .do_stab_bolted_iSeries: mtcrf 0x80,r12 mfspr r12,SPRN_SPRG2 EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1 b .do_stab_bolted .globl data_access_slb_iSeries Loading Loading @@ -171,7 +172,7 @@ slb_miss_user_iseries: std r10,PACA_EXGEN+EX_R13(r13) std r11,PACA_EXGEN+EX_R9(r13) std r12,PACA_EXGEN+EX_R3(r13) EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_1 b slb_miss_user_common #endif Loading @@ -187,7 +188,7 @@ slb_miss_user_iseries: system_call_iSeries: mr r9,r13 mfspr r13,SPRN_SPRG3 EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_1 b system_call_common STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN) Loading
arch/powerpc/platforms/iseries/exception.h 0 → 100644 +58 −0 Original line number Diff line number Diff line #ifndef _ASM_POWERPC_ISERIES_EXCEPTION_H #define _ASM_POWERPC_ISERIES_EXCEPTION_H /* * Extracted from head_64.S * * PowerPC version * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> * Adapted for Power Macintosh by Paul Mackerras. * Low-level exception handlers and MMU support * rewritten by Paul Mackerras. * Copyright (C) 1996 Paul Mackerras. * * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com * * This file contains the low-level support and setup for the * PowerPC-64 platform, including trap and interrupt dispatch. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ #include <asm/exception.h> #define EXCEPTION_PROLOG_ISERIES_1 \ mfmsr r10; \ ld r12,PACALPPACAPTR(r13); \ ld r11,LPPACASRR0(r12); \ ld r12,LPPACASRR1(r12); \ ori r10,r10,MSR_RI; \ mtmsrd r10,1 #define STD_EXCEPTION_ISERIES(n, label, area) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_1(area); \ EXCEPTION_PROLOG_ISERIES_1; \ b label##_common #define MASKABLE_EXCEPTION_ISERIES(n, label) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_1(PACA_EXGEN); \ lbz r10,PACASOFTIRQEN(r13); \ cmpwi 0,r10,0; \ beq- label##_iSeries_masked; \ EXCEPTION_PROLOG_ISERIES_1; \ b label##_common; \ #endif /* _ASM_POWERPC_ISERIES_EXCEPTION_H */
include/asm-powerpc/exception.h +12 −59 Original line number Diff line number Diff line Loading @@ -62,6 +62,16 @@ ori reg,reg,(label)@l; /* virt addr of handler ... */ #endif #define EXCEPTION_PROLOG_1(area) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9 /* * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode. * The firmware calls the registered system_reset_fwnmi and Loading @@ -70,14 +80,7 @@ * This firmware bug is present on POWER4 and JS20. */ #define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9; \ EXCEPTION_PROLOG_1(area); \ clrrdi r12,r13,32; /* get high part of &label */ \ mfmsr r10; \ /* force 64bit mode */ \ Loading @@ -94,14 +97,7 @@ b . /* prevent speculative execution */ #define EXCEPTION_PROLOG_PSERIES(area, label) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9; \ EXCEPTION_PROLOG_1(area); \ clrrdi r12,r13,32; /* get high part of &label */ \ mfmsr r10; \ mfspr r11,SPRN_SRR0; /* save SRR0 */ \ Loading @@ -113,28 +109,6 @@ rfid; \ b . /* prevent speculative execution */ /* * This is the start of the interrupt handlers for iSeries * This code runs with relocation on. */ #define EXCEPTION_PROLOG_ISERIES_1(area) \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r10,area+EX_R10(r13); \ std r11,area+EX_R11(r13); \ std r12,area+EX_R12(r13); \ mfspr r9,SPRN_SPRG1; \ std r9,area+EX_R13(r13); \ mfcr r9 #define EXCEPTION_PROLOG_ISERIES_2 \ mfmsr r10; \ ld r12,PACALPPACAPTR(r13); \ ld r11,LPPACASRR0(r12); \ ld r12,LPPACASRR1(r12); \ ori r10,r10,MSR_RI; \ mtmsrd r10,1 /* * The common exception prolog is used for all except a few exceptions * such as a segment miss on a kernel address. We have to be prepared Loading Loading @@ -247,27 +221,6 @@ label##_pSeries: \ rfid; \ b . /* prevent speculative execution */ #define STD_EXCEPTION_ISERIES(n, label, area) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_ISERIES_1(area); \ EXCEPTION_PROLOG_ISERIES_2; \ b label##_common #define MASKABLE_EXCEPTION_ISERIES(n, label) \ .globl label##_iSeries; \ label##_iSeries: \ HMT_MEDIUM; \ mtspr SPRN_SPRG1,r13; /* save r13 */ \ EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \ lbz r10,PACASOFTIRQEN(r13); \ cmpwi 0,r10,0; \ beq- label##_iSeries_masked; \ EXCEPTION_PROLOG_ISERIES_2; \ b label##_common; \ #ifdef CONFIG_PPC_ISERIES #define DISABLE_INTS \ li r11,0; \ Loading