Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 714b1dd8 authored by Jonathan Bell's avatar Jonathan Bell Committed by Linus Walleij
Browse files

pinctrl: bcm2835: Clear the event latch register when disabling interrupts 



It's possible to hit a race condition if interrupts are generated on a GPIO
pin when the IRQ line in question is being disabled.

If the interrupt is freed, bcm2835_gpio_irq_disable() is called which
disables the event generation sources (edge, level). If an event occurred
between the last disabling of hard IRQs and the write to the event
source registers, a bit would be set in the GPIO event detect register
(GPEDSn) which goes unacknowledged by bcm2835_gpio_irq_handler()
so Linux complains loudly.

There is no per-GPIO mask register, so when disabling GPIO interrupts
write 1 to the relevant bit in GPEDSn to clear out any stale events.

Signed-off-by: default avatarJonathan Bell <jonathan@raspberrypi.org>
Acked-by: default avatarStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent c10372e6

drivers/pinctrl/bcm/pinctrl-bcm2835.c

+2 −0
Original line number Diff line number Diff line
@@ -473,6 +473,8 @@ static void bcm2835_gpio_irq_disable(struct irq_data *data) 


	spin_lock_irqsave(&pc->irq_lock[bank], flags);

	bcm2835_gpio_irq_config(pc, gpio, false);

	/* Clear events that were latched prior to clearing event sources */

	bcm2835_gpio_set_bit(pc, GPEDS0, gpio);

	clear_bit(offset, &pc->enabled_irq_map[bank]);

	spin_unlock_irqrestore(&pc->irq_lock[bank], flags);

}