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Commit 70f767d3 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue 



Jeff Kirsher says:

====================
10GbE Intel Wired LAN Driver Updates 2016-04-07

This series contains updates to ixgbe and ixgbevf.

This entire series (except for one patch from Alex) comes from Mark and
is mainly to add support for our new MAC (x550em_a).

So let's get Alex's patch out of the way first before we cover Mark's
many changes.  Alex does his enable bulk free in transmit cleanup for
ixgbe and ixgbevf, like his has done for all of our other drivers.

First Mark cleans up registers that were not being used, so do some
house cleaning.  Then to avoid casting lan_id and func fields, just
make them u8 since they only hold small values anyways.  Found and
fixed an issue where on read operations it could be possible to
modify locations beyond the length passed in, so change the check
to round up in the same way.  Cleaned up the interface for issuing
firmware commands to use a void * instead of a u32 * which eliminates
a number of casts.  Added support for the new MAC and provided method
pointers and use them to access IOSF-attached devices, since the
new MAC will also need a new access method.  Added support for SFPs
with an external retimer and for an SGMII backplane interface.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f8711655 10ef00fe

drivers/net/ethernet/intel/ixgbe/ixgbe.h

+3 −0
Original line number Diff line number Diff line
@@ -817,6 +817,7 @@ static inline u8 ixgbe_max_rss_indices(struct ixgbe_adapter *adapter) 
		return IXGBE_MAX_RSS_INDICES;

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		return IXGBE_MAX_RSS_INDICES_X550;

	default:

		return 0;
@@ -860,6 +861,7 @@ enum ixgbe_boards { 
	board_X540,

	board_X550,

	board_X550EM_x,

	board_x550em_a,

};



extern const struct ixgbe_info ixgbe_82598_info;
@@ -867,6 +869,7 @@ extern const struct ixgbe_info ixgbe_82599_info; 
extern const struct ixgbe_info ixgbe_X540_info;

extern const struct ixgbe_info ixgbe_X550_info;

extern const struct ixgbe_info ixgbe_X550EM_x_info;

extern const struct ixgbe_info ixgbe_x550em_a_info;

#ifdef CONFIG_IXGBE_DCB

extern const struct dcbnl_rtnl_ops dcbnl_ops;

#endif

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

+1 −0
Original line number Diff line number Diff line
@@ -1633,6 +1633,7 @@ s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw, 
	switch (hw->mac.type) {

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm);

		break;

	default:

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

+52 −31
Original line number Diff line number Diff line
@@ -97,6 +97,7 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw) 
		case IXGBE_DEV_ID_X540T:

		case IXGBE_DEV_ID_X540T1:

		case IXGBE_DEV_ID_X550T:

		case IXGBE_DEV_ID_X550T1:

		case IXGBE_DEV_ID_X550EM_X_10G_T:

			supported = true;

			break;
@@ -681,6 +682,7 @@ s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw) 
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw)

{

	struct ixgbe_bus_info *bus = &hw->bus;

	u16 ee_ctrl_4;

	u32 reg;



	reg = IXGBE_READ_REG(hw, IXGBE_STATUS);
@@ -691,6 +693,13 @@ void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw) 
	reg = IXGBE_READ_REG(hw, IXGBE_FACTPS(hw));

	if (reg & IXGBE_FACTPS_LFS)

		bus->func ^= 0x1;



	/* Get MAC instance from EEPROM for configuring CS4227 */

	if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) {

		hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4);

		bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >>

				   IXGBE_EE_CTRL_4_INST_ID_SHIFT;

	}

}



/**
@@ -2854,6 +2863,7 @@ u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw) 
	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;

		max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;

		break;
@@ -3483,18 +3493,27 @@ static u8 ixgbe_calculate_checksum(u8 *buffer, u32 length) 
 *  Communicates with the manageability block.  On success return 0

 *  else return IXGBE_ERR_HOST_INTERFACE_COMMAND.

 **/

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *buffer,

				 u32 length, u32 timeout,

				 bool return_data)

{

	u32 hicr, i, bi, fwsts;

	u32 hdr_size = sizeof(struct ixgbe_hic_hdr);

	u32 hicr, i, bi, fwsts;

	u16 buf_len, dword_len;

	union {

		struct ixgbe_hic_hdr hdr;

		u32 u32arr[1];

	} *bp = buffer;

	s32 status;



	if (length == 0 || length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) {

	if (!length || length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) {

		hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length);

		return IXGBE_ERR_HOST_INTERFACE_COMMAND;

	}

	/* Take management host interface semaphore */

	status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);

	if (status)

		return status;



	/* Set bit 9 of FWSTS clearing FW reset indication */

	fwsts = IXGBE_READ_REG(hw, IXGBE_FWSTS);
@@ -3502,26 +3521,27 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, 


	/* Check that the host interface is enabled. */

	hicr = IXGBE_READ_REG(hw, IXGBE_HICR);

	if ((hicr & IXGBE_HICR_EN) == 0) {

	if (!(hicr & IXGBE_HICR_EN)) {

		hw_dbg(hw, "IXGBE_HOST_EN bit disabled.\n");

		return IXGBE_ERR_HOST_INTERFACE_COMMAND;

		status = IXGBE_ERR_HOST_INTERFACE_COMMAND;

		goto rel_out;

	}



	/* Calculate length in DWORDs. We must be DWORD aligned */

	if ((length % (sizeof(u32))) != 0) {

	if (length % sizeof(u32)) {

		hw_dbg(hw, "Buffer length failure, not aligned to dword");

		return IXGBE_ERR_INVALID_ARGUMENT;

		status = IXGBE_ERR_INVALID_ARGUMENT;

		goto rel_out;

	}



	dword_len = length >> 2;



	/*

	 * The device driver writes the relevant command block

	/* The device driver writes the relevant command block

	 * into the ram area.

	 */

	for (i = 0; i < dword_len; i++)

		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_FLEX_MNG,

				      i, cpu_to_le32(buffer[i]));

				      i, cpu_to_le32(bp->u32arr[i]));



	/* Setting this bit tells the ARC that a new command is pending. */

	IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C);
@@ -3534,32 +3554,34 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, 
	}



	/* Check command successful completion. */

	if ((timeout != 0 && i == timeout) ||

	    (!(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV))) {

	if ((timeout && i == timeout) ||

	    !(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV)) {

		hw_dbg(hw, "Command has failed with no status valid.\n");

		return IXGBE_ERR_HOST_INTERFACE_COMMAND;

		status = IXGBE_ERR_HOST_INTERFACE_COMMAND;

		goto rel_out;

	}



	if (!return_data)

		return 0;

		goto rel_out;



	/* Calculate length in DWORDs */

	dword_len = hdr_size >> 2;



	/* first pull in the header so we know the buffer length */

	for (bi = 0; bi < dword_len; bi++) {

		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);

		le32_to_cpus(&buffer[bi]);

		bp->u32arr[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);

		le32_to_cpus(&bp->u32arr[bi]);

	}



	/* If there is any thing in data position pull it in */

	buf_len = ((struct ixgbe_hic_hdr *)buffer)->buf_len;

	if (buf_len == 0)

		return 0;

	buf_len = bp->hdr.buf_len;

	if (!buf_len)

		goto rel_out;



	if (length < (buf_len + hdr_size)) {

	if (length < round_up(buf_len, 4) + hdr_size) {

		hw_dbg(hw, "Buffer not large enough for reply message.\n");

		return IXGBE_ERR_HOST_INTERFACE_COMMAND;

		status = IXGBE_ERR_HOST_INTERFACE_COMMAND;

		goto rel_out;

	}



	/* Calculate length in DWORDs, add 3 for odd lengths */
@@ -3567,11 +3589,14 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, 


	/* Pull in the rest of the buffer (bi is where we left off) */

	for (; bi <= dword_len; bi++) {

		buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);

		le32_to_cpus(&buffer[bi]);

		bp->u32arr[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);

		le32_to_cpus(&bp->u32arr[bi]);

	}



	return 0;

rel_out:

	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);



	return status;

}



/**
@@ -3594,13 +3619,10 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 
	int i;

	s32 ret_val;



	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM))

		return IXGBE_ERR_SWFW_SYNC;



	fw_cmd.hdr.cmd = FW_CEM_CMD_DRIVER_INFO;

	fw_cmd.hdr.buf_len = FW_CEM_CMD_DRIVER_INFO_LEN;

	fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;

	fw_cmd.port_num = (u8)hw->bus.func;

	fw_cmd.port_num = hw->bus.func;

	fw_cmd.ver_maj = maj;

	fw_cmd.ver_min = min;

	fw_cmd.ver_build = build;
@@ -3612,7 +3634,7 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 
	fw_cmd.pad2 = 0;



	for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {

		ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

		ret_val = ixgbe_host_interface_command(hw, &fw_cmd,

						       sizeof(fw_cmd),

						       IXGBE_HI_COMMAND_TIMEOUT,

						       true);
@@ -3628,7 +3650,6 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 
		break;

	}



	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);

	return ret_val;

}

drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

+2 −2
Original line number Diff line number Diff line
@@ -111,8 +111,8 @@ void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 
s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);

s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,

				 u8 build, u8 ver);

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

				 u32 length, u32 timeout, bool return_data);

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length,

				 u32 timeout, bool return_data);

void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);

bool ixgbe_mng_present(struct ixgbe_hw *hw);

bool ixgbe_mng_enabled(struct ixgbe_hw *hw);

drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c

+5 −1
Original line number Diff line number Diff line 
/*******************************************************************************



  Intel 10 Gigabit PCI Express Linux driver

  Copyright(c) 1999 - 2014 Intel Corporation.

  Copyright(c) 1999 - 2016 Intel Corporation.



  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,
@@ -293,6 +293,7 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, 
	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		return ixgbe_dcb_hw_config_82599(hw, pfc_en, refill, max,

						 bwgid, ptype, prio_tc);

	default:
@@ -311,6 +312,7 @@ s32 ixgbe_dcb_hw_pfc_config(struct ixgbe_hw *hw, u8 pfc_en, u8 *prio_tc) 
	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		return ixgbe_dcb_config_pfc_82599(hw, pfc_en, prio_tc);

	default:

		break;
@@ -368,6 +370,7 @@ s32 ixgbe_dcb_hw_ets_config(struct ixgbe_hw *hw, 
	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max,

						  bwg_id, prio_type, prio_tc);

		ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
@@ -398,6 +401,7 @@ void ixgbe_dcb_read_rtrup2tc(struct ixgbe_hw *hw, u8 *map) 
	case ixgbe_mac_X540:

	case ixgbe_mac_X550:

	case ixgbe_mac_X550EM_x:

	case ixgbe_mac_x550em_a:

		ixgbe_dcb_read_rtrup2tc_82599(hw, map);

		break;

	default: